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Chip packaging structure and packaging method

A chip packaging structure and chip technology, applied in the direction of electrical components, electrical solid devices, circuits, etc., can solve problems such as poor bonding

Active Publication Date: 2020-08-14
FOREHOPE ELECTRONICS NINGBO CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, when the bumps of the chip and the pads of the substrate are soldered, the substrate and the chip are easily deformed by the high heat generated during the soldering process. Because of the difference in expansion coefficient between the two, the soldered structure formed after soldering will be deformed. The effect of stress, resulting in poor bonding

Method used

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  • Chip packaging structure and packaging method
  • Chip packaging structure and packaging method
  • Chip packaging structure and packaging method

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Embodiment Construction

[0031] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. The components of the embodiments of the invention generally described and illustrated in the figures herein may be arranged and designed in a variety of different configurations.

[0032] Accordingly, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art wi...

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Abstract

The invention provides a chip packaging structure and a packaging method, and belongs to the technical field of chip packaging. The chip packaging structure comprises a substrate on which a circuit layer is formed, a connecting structure is formed on the substrate, the connecting structure comprises a glue inlet hole, a glue outlet hole and a channel which are communicated with one another, the channel is formed in the substrate and connected with the circuit layer, the glue inlet hole and the glue outlet hole are formed in one side plate face of the substrate, the connecting structure is filled with conductive colloid, a first chip is attached to the substrate, and a leading-out end of the first chip is bonded with the connecting structure through the conductive colloid. According to thechip packaging structure and the packaging method provided by the invention, the chip is fixed through the conductive adhesive, and the chip and the circuit layer in the substrate are conducted, so that poor combination caused by welding can be avoided, and the chip packaging performance is improved.

Description

technical field [0001] The present invention relates to the technical field of chip packaging, in particular to a chip packaging structure and a packaging method. Background technique [0002] With the rapid development of the semiconductor industry, chip flip-chip (FC, Flip chip) technology is widely used in electronic products. [0003] In the current flip-chip mounting, the chip is usually welded on the pad of the substrate by using bumps formed on the surface of the chip connected to the lead-out terminals, so as to communicate the chip with the circuit layer in the substrate through the bumps. [0004] However, when the bumps of the chip and the pads of the substrate are soldered, the substrate and the chip are easily deformed by the high heat generated during the soldering process. Because of the difference in expansion coefficient between the two, the soldered structure formed after soldering will be deformed. The role of stress, resulting in poor bonding. Contents...

Claims

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Application Information

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IPC IPC(8): H01L23/488H01L23/49H01L21/60
CPCH01L23/49H01L23/488H01L24/85H01L2224/8585H01L2224/8589H01L2924/181H01L2224/13082H01L2224/16225H01L2924/15192H01L2924/15311H01L2924/00012
Inventor 何正鸿孙杰
Owner FOREHOPE ELECTRONICS NINGBO CO LTD
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