Integrated circuit structure and manufacturing method thereof

A technology of integrated circuit and manufacturing method, which is applied in the field of integrated circuit packaging, testing and manufacturing, can solve problems such as severe bending, cracks in the substrate, peeling off of the substrate and the packaging layer, and achieve the effect of preventing delamination and preventing excessive stress

Active Publication Date: 2020-08-04
TIANJIN HENGLIYUANDA INSTR
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Although this method can save vertical space and reduce the thickness of the package, the edge of the substrate 1 will be bent toward the opening of the groove 2 due to the heating effect in the subsequent packaging pr

Method used

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  • Integrated circuit structure and manufacturing method thereof
  • Integrated circuit structure and manufacturing method thereof
  • Integrated circuit structure and manufacturing method thereof

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Embodiment Construction

[0040] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are some, but not all, embodiments of the present disclosure. Based on the described embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the protection scope of the present disclosure.

[0041] Unless otherwise defined, technical or scientific terms used in this disclosure shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. As used in this disclosure, "first," "second," and similar words do not denote any order, quantity, or importance, but are merely used t...

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Abstract

The invention provides an integrated circuit structure and a manufacturing method thereof. A first sealing layer is formed in a substrate, a second sealing layer is formed on the substrate, and the first sealing layer and the second sealing layer provide pressure stress so as to counteract the warping force of the substrate. Moreover, the filling ratios of inorganic fillers of the first sealing layer and the second sealing layer are different such that the first sealing layer and the second sealing layer have a pressure stress difference, and the binding force of the first sealing layer and the second sealing layer can be ensured while the substrate is not warped.

Description

technical field [0001] The invention relates to the field of integrated circuit packaging, testing and manufacturing, in particular to an integrated circuit structure and a manufacturing method thereof. Background technique [0002] The existing embedded semiconductor integrated packaging structure is often in the form of embedding a chip by forming a groove on the substrate. For details, please refer to figure 1 . exist figure 1 Among them, the substrate 1 is a substrate with a large area, which can integrate various and multiple chips to realize different integrated circuit packaging functions. In order to embed the chip in the substrate 1, the center position of the chip needs to be set A recess 2 to place at least one chip. Although this method can save vertical space and reduce the thickness of the package body, the edge of the substrate 1 will be bent toward the opening of the groove 2 with the support of the thermal effect in the subsequent packaging process. If m...

Claims

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Application Information

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IPC IPC(8): H01L23/29H01L23/24H01L23/498H01L21/48H01L21/54H01L21/56H01L21/60
CPCH01L23/29H01L23/295H01L23/49827H01L23/24H01L21/56H01L21/54H01L21/486H01L24/81H01L2224/16225H01L2224/18H01L2924/15153H01L2224/73267H01L2224/32225H01L2224/92244H01L2224/16227H01L2924/15311H01L2224/04105H01L2224/12105
Inventor 杨振洲
Owner TIANJIN HENGLIYUANDA INSTR
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