Multi-project and multi-platform adaptive chip design fpga prototype verification method and system

Abstract

The invention discloses a multi-project and multi-platform self-adaptive chip design FPGA prototype verification method and system. The invention includes executing multi-project and multi-platform initialization, determining the project code of the chip design, the platform code of the use test, and generating the corresponding The list of files and parameter files required for the operation of the project library and platform environment library are submitted to the version management warehouse of the corresponding test platform; the continuous integration tool is triggered to start the client according to the script to compile, simulate, synthesize, and implement, and generate a test report and upload it to Version management repository. The invention couples multiple chip design projects with multiple FPGA prototype verification platform environments, supports verification developers to perform flexible switching between multiple projects and multiple verification platforms in a version management library, and only requires a small amount of configuration. It can quickly complete the automated process of FPGA prototype verification for the specified platform of the specified project.

Description

technical field [0001] The invention relates to a prototype verification technology of FPGA chip design, in particular to a multi-item and multi-platform self-adaptive chip design FPGA prototype verification method and system. Background technique [0002] As the difficulty and challenges of integrated circuit design further increase, in the chip development and verification stage, there are more and more iterative versions of the design code, and each design version requires functional verification. Due to different actual requirements and technical indicators, the project team will have multiple chip designs under development and verification at the same time. Therefore, how to simultaneously carry out and accelerate the verification process iterations of multiple projects is a key issue to be solved in the chip design and verification phase. [0003] For large-scale chips, FPGA prototype verification has become the mainstream method in the field of functional verificatio...

AI Technical Summary

Problems solved by technology

Considering that the same FPGA prototype verification platform can be used for different projects, the operating environment and configuration can be used without extensive modification, so maintaining multiple different project libraries and verification environment libraries at the same time is not only time-consuming and labor-intensive, but also reduces the overall cost of prototype verification. efficiency

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