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Clock generation circuit and clock generator

A technology of clock generation circuit and synthetic signal, which is applied in the direction of electrical components, automatic power control, etc., can solve the problems of high cost and large volume, and achieve low cost, small hardware volume and simple effect

Pending Publication Date: 2020-06-30
NEWCOSEMI BEIJING TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This implementation has high stability, but the volume is large and the cost is high

Method used

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  • Clock generation circuit and clock generator

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Embodiment 1

[0026] see figure 1 , figure 1 It is a schematic structural diagram of a clock generating circuit disclosed in the embodiment of the present application.

[0027] In the technical solutions disclosed in the embodiments of this application, see figure 1 The clock generation circuit includes:

[0028] A first phase sampler 100, a second phase sampler 200, a low-pass filter 300, a band-pass filter 400, a composite signal generator 500, a phase-locked loop 600 and a phase adjuster 700;

[0029] The input end of the first phase sampler is used to obtain a first signal with a preset frequency, and the first signal is phase-sampled based on a reference signal to obtain a signal V1, that is, the first phase sampler detects When the set time in each cycle of the reference signal arrives, the first signal is sampled. The set time may refer to the rising edge, falling edge or other time of the reference signal. In this In the solution, the first signal can refer to a long-term freque...

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PUM

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Abstract

The invention provides a clock generation circuit and generator, and the method comprises the steps: firstly carrying out the phase sampling of a first signal according to a reference signal, then carrying out the low-pass filtering, and extracting a low-frequency clock phase signal; meanwhile, conducting phase sampling on the second signal according to the reference signal, then conducting band-pass filtering, and extracting an intermediate-frequency clock phase signal; and then superposing and synthesizing a clock phase signal output by the low-pass filter and a clock phase signal output bythe band-pass filter, then carrying out smoothing processing on the synthesized signals through a phase-locked loop, and outputting a slowly changing clock signal; and finally, performing phase adjustment on the clock signal output by the phase-locked loop by referring to the long-term frequency stabilization signal, and enabling the phase to be consistent with the phase of the long-term frequencystabilization signal by increasing and decreasing the phase so as to output a high-stability clock signal. The circuit provided by the embodiment of the invention is simple to implement, requires fewer added elements, and is small in hardware size and low in cost.

Description

technical field [0001] The invention relates to the technical field of electronic circuits, in particular to a clock generation circuit and a clock generator. Background technique [0002] 5G communication has faster data transmission rate, lower response delay and higher throughput, which is one of the development trends of future network communication. At present, operators and equipment manufacturers are intensively deploying 5G communication network, and gradually commercial. In the 5G communication network, many links require accurate and stable clocks to ensure efficient and high-quality communication on the network. [0003] In the prior art, high-stable clocks are mainly generated by the following two methods: (1) directly generated by atomic clocks, which has the highest stability, but is bulky and expensive. (2) Provide long-term frequency stability through GPS signals, and provide short-term frequency stability and low jitter through OCXO signals. This implemen...

Claims

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Application Information

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IPC IPC(8): H03L7/099
CPCH03L7/099
Inventor 皮德义刘昌刘金亮
Owner NEWCOSEMI BEIJING TECH CO LTD
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