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Two-step double-slope analog-to-digital converter and analog-to-digital conversion method thereof

An analog-to-digital converter and dual-slope technology, applied in the direction of analog-to-digital converters, can solve the problems of increasing the power consumption of ADC circuits, and achieve the effects of ensuring the accuracy of analog-to-digital conversion, accelerating conversion speed, and increasing power consumption

Inactive Publication Date: 2020-06-19
SOUTHEAST UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Later, the ADC with two slopes appeared, including a thick slope generating circuit and multiple fine slope generating circuits, which greatly increased the power consumption of the ADC circuit.

Method used

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  • Two-step double-slope analog-to-digital converter and analog-to-digital conversion method thereof
  • Two-step double-slope analog-to-digital converter and analog-to-digital conversion method thereof
  • Two-step double-slope analog-to-digital converter and analog-to-digital conversion method thereof

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Embodiment Construction

[0028] The technical solution of the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0029] Such as figure 1As shown, the two-step dual-slope analog-to-digital converter includes a rough ramp generating circuit, a fine ramp generating circuit, a comparator, a thick ramp counter, a fine ramp counter, and a timing control circuit. The positive input terminal of the comparator is connected to the analog input signal, The negative input terminal is connected to the output of the thick ramp generating circuit or the fine ramp generating circuit, the output of the comparator is connected to the thick ramp counter or the fine ramp counter, and at the same time, the output of the comparator is also connected to an input terminal of the timing control circuit; the timing control circuit controls the single pole double Throwing switch S1 selects the output end of the thick ramp generating circuit or the fine r...

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Abstract

The invention discloses a two-step double-slope analog-to-digital converter and an analog-to-digital conversion method thereof. The converter comprises a coarse slope generation circuit, a fine slopegeneration circuit, a comparator, a coarse slope counter, a fine slope counter and a sequential control circuit. For the ADC, a rough range of an input signal is determined by comparing the input signal with a voltage value of a rough ramp, and several bits of high-order bit data of analog-to-digital conversion are determined at the same time; determining an integral initial level of the fine rampgenerator according to a result of the coarse ramp counter; the remaining low bit data of the analog-to-digital conversion is determined by comparing the input signal and the fine ramp integration signal. According to the invention, the conversion precision of the ADC can be ensured under the condition that only one coarse slope generation circuit and one fine slope generation circuit are used, and the problem that the conversion time of a traditional single-slope ADC is too long can be solved to a great extent.

Description

technical field [0001] The invention relates to an analog-to-digital converter, in particular to a two-step double-slope analog-to-digital converter and an analog-to-digital conversion method thereof. Background technique [0002] The CMOS array readout circuit has significant advantages such as high integration, small size, low power consumption, and low price, and has received more and more attention. In the readout circuit, the core processing unit, the analog-to-digital converter (ADC), has always been a difficult point in design and a hot spot in research. The traditional ADC is mainly based on a single-slope ADC, which generates a slope signal through a slope generator, and compares it with the analog signal of the pixel to complete the comparison from all 0 to all 1, and the inversion point of the output of the comparator (the output level is determined by High level to low level or from low level to high level) becomes the digital code converted from the analog sign...

Claims

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Application Information

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IPC IPC(8): H03M1/18
CPCH03M1/18
Inventor 吴旭王志鹏何龙冯军李连鸣
Owner SOUTHEAST UNIV
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