A high-precision satellite second pulse synchronization timing device and method
A pulse-per-second, high-precision technology, which is applied in the field of high-precision satellite pulse-per-second synchronous timing devices, can solve the problems of output 1PPS signal jitter and the inability to effectively remove satellite 1PPS signal jumps, etc., and achieve the elimination of cumulative errors and satellite 1PPS signals jump effect
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Embodiment 1
[0051] Such as figure 1 Shown, a kind of high-precision satellite second pulse synchronous time keeping device, comprises clock source, satellite receiver, synchronous module, output device and CPU;
[0052] The output terminal of the satellite receiver is respectively connected with the input terminal of the clock source and the first input terminal of the synchronization module, the output terminal of the clock source is connected with the second input terminal of the synchronization module, and the output terminal of the synchronization module is connected with the input terminal of the output device ;
[0053] The synchronization module communicates with the CPU.
[0054] The clock source in this embodiment is a high-precision tameable rubidium atomic clock, and the satellite 1PPS signal output by the satellite receiver will tame the rubidium atomic clock, so that its output clock is synchronized with the satellite 1PPS signal, and its output clock will be used as the clo...
Embodiment 2
[0063] Such as figure 2 Shown, a kind of high-precision satellite second pulse synchronous time-keeping method comprises the following steps:
[0064] S1. Receive the satellite signal through the satellite receiver, and output the satellite 1PPS signal to the synchronization module and rubidium atomic clock;
[0065] Among them, the satellite 1PPS signal input to the rubidium atomic clock will tame the rubidium atomic clock, so that the output clock signal is synchronized with the satellite 1PPS signal;
[0066] S2, the rubidium atomic clock is multiplied into a 125Mhz clock signal by using the PLL core, and input into the synchronization module as its internal clock;
[0067] S3. In the synchronization module, when the rising edge of the satellite 1PPS signal is detected, the 1PPS signal is pulled high, and the internal high-precision punctual counter counts at the same time;
[0068] S4. Detect the phase difference signal between the input 1PPS signal and the output 1PPS ...
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