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Program updating method and system based on FPGA

A program update and file technology, applied in software engineering design, software deployment, instruments, etc., can solve the problems of low utilization rate, low efficiency, low interface utilization rate, etc., and achieve the effect of efficient utilization and efficiency improvement.

Inactive Publication Date: 2020-03-24
江苏北方湖光光电有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The connection of the JTAG interface is complicated. If it is used as an external interface of the device, the utilization rate of this interface is not high, and it will affect the appearance of the device; if it is not used as an external interface of the device, the update program will inevitably require tedious device disassembly.
[0003] Using the JTAG emulator to solidify the Flash program requires carrying a dedicated JTAG emulation downloader, and there is a related JTAG interface on the external interface of the device, and the connection of the interface is complicated, the utilization rate is not high, and the appearance of the device is affected; if the external interface is not The corresponding JTAG interface must be disassembled and installed, which is time-consuming and labor-intensive, and the efficiency is low

Method used

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  • Program updating method and system based on FPGA
  • Program updating method and system based on FPGA
  • Program updating method and system based on FPGA

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Embodiment Construction

[0030] The preferred embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

[0031] In order to achieve the purpose of the present invention, as figure 1 As shown, in one of the embodiments of the present invention, a method for updating programs based on FPGA is provided, comprising the following steps:

[0032] First, the sof file and the elf file are synthesized into a hex file through a script sh file;

[0033] Then, the host computer reads the hex file and sends it to the FPGA through a serial cable, and controls the FPGA to write the data in the hex file into the Flash according to the address information, so as to realize program update and solidification.

[0034] Such as figure 2 As shown, it specifically includes the following s...

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Abstract

The invention discloses a program updating method and system based on an FPGA. The updating method comprises the following steps that firstly, a soff file and an elf file are synthesized into a hex file through a script sh file; and then an upper computer reads the hex file, sends the hex file to the FPGA through a serial cable, and controls the FPGA to write data in the hex file into the Flash according to address information, thereby realizing program updating and solidification. The programming solidification of the FPGA program is realized by combining the external serial port with the upper computer program, complex equipment disassembly and installation work is not needed, the programming solidification time of the program is about 10 minutes, the efficiency is greatly improved, andthe efficient utilization of external serial port resources is realized.

Description

technical field [0001] The invention belongs to the technical field of electronic communication, and in particular relates to an FPGA-based program updating method and system. Background technique [0002] SRAM-based technology FPGA, due to the special process characteristics of SRAM, FPGA data will be lost after power off. Therefore, power-down non-volatile memory is often used, combined with FPGA to build an embedded system. EPCS (Erasable Programmable Configurable Serial) Flash belongs to the serial interface, which has the characteristics of simple interface, small size and convenient configuration. It is often used to store FPGA configuration files and Nios II executable codes. After reasonable configuration, FPGA can directly read files from EPCS Flash and start the system. At present, the commonly used FPGA program curing method is: first, merge and convert the FPGA configuration file (.sof file) and Nios II executable code (.elf file) into a jic file, and then use ...

Claims

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Application Information

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IPC IPC(8): G06F8/654G06F8/61G06F13/42
CPCG06F8/654G06F8/63G06F13/4282
Inventor 唐骏高志强顾鑫张茹玥沙怡中钱佳宋杨
Owner 江苏北方湖光光电有限公司
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