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Forming method of semiconductor structure

A semiconductor and bonding layer technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems that the semiconductor structure formation method needs to be improved

Active Publication Date: 2020-02-21
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Formation methods of existing semiconductor structures still need to be improved

Method used

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  • Forming method of semiconductor structure
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  • Forming method of semiconductor structure

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Embodiment Construction

[0019] According to the background technology, the performance of the existing semiconductor structure still needs to be improved.

[0020] The analysis is now combined with a method for forming a semiconductor structure. The process steps for forming a semiconductor structure mainly include: providing a substrate, the substrate including a first region and a second region; forming a dielectric layer on the surface of the substrate, the first region The dielectric layer has a first through hole, the dielectric layer in the second region has a second through hole, and the opening of the first through hole is the same as the opening of the second through hole; In the process step, a first oxide layer is formed on the sidewall and bottom of the first through hole, and a second oxide layer is formed on the sidewall and bottom of the second through hole; in the same process step, etching is removed The first oxide layer located at the bottom of the first through hole, the second oxide...

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Abstract

A forming method of a semiconductor structure is disclosed. The method comprises the following steps of providing a substrate which includes a first area and a second area; forming a dielectric layeron a surface of the substrate, wherein a first through hole is arranged in a first area dielectric layer, a second through hole is arranged in a second area dielectric layer, and a first through holeopening is larger than a second through hole opening; forming a first oxide layer in the first through hole, and forming a second oxide layer in the second through hole; etching to remove the first oxide layer at a bottom of the first through hole and the second oxide layer with a partial thickness at the bottom of the second through hole, and forming a groove in the substrate below the first through hole; forming a first side wall on the first through hole and a side wall of a groove, and forming a second side wall on the side wall of the second through hole; forming a first word line layer in the first through hole and the groove; forming a second word line layer in the second through hole; removing the second area dielectric layer, the second oxide layer, the second side wall and the second word line layer; and removing the substrate with the partial thickness in the second area. In the invention, the second side wall can be etched and removed cleanly, and a product yield is improved.

Description

Technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] A silicon chip is composed of many compact, hexagonal cells. The number of cells is related to the size of the silicon single crystal. For example, a silicon single crystal of 120 mil sqt contains about 5000 cells, and a silicon single crystal of 240 mil sqt contains about 25000 cells. [0003] Adjacent cells are separated by a peripheral area, and there is a cell ring between the cell and the peripheral area. The unit transition zone surrounds the unit and can play a role in protecting the unit. [0004] The formation method of the existing semiconductor structure still needs to be improved. Summary of the invention [0005] The problem solved by the present invention is to provide a method for forming a semiconductor structure, which helps to etch and remove the second sidewall s...

Claims

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Application Information

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IPC IPC(8): H01L21/768
CPCH01L21/76802H01L21/76831H01L21/76832H01L21/76834
Inventor 付博曹启鹏王卉陈宏
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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