Silicon-based adapter plate structure for reducing equivalent dielectric constant and preparation method thereof

Abstract

The invention discloses an adapter plate structure for reducing equivalent dielectric constant. The adapter plate structure includes a first adapter plate, a first conductive vias, a first insulationlayer, a first locating and wiring layer, a second adapter plate, a second conductive vias, a second insulation layer, a second locating and wiring layer, and an internal cavity, wherein the first conductive vias penetrates in the first adapter plate; the first insulation layer covers the upper surface of the first adapter plate; the first locating and wiring layer is arranged above the first insulation layer and is electrically connected with the first conductive vias; the second adapter plate is disposed below the first adapter plate; the second conductive vias penetrates in the second adapter plate and is electrically connected with the first conductive vias; the second insulation layer covers the lower surface of the second adapter plate; the second locating and wiring layer is arranged below the second insulation layer and is electrically connected with the second conductive vias; and the internal cavity is disposed near a bonding surface of the first adapter plate and the secondadapter plate.

Description

technical field [0001] The invention relates to the technical field of semiconductor packaging, in particular to a silicon-based adapter plate structure with reduced equivalent dielectric constant and a preparation method thereof. Background technique [0002] With the continuous development of microelectronics technology, users have higher and higher requirements for the miniaturization, multi-function, low power consumption and high reliability of the system, especially in recent years, the blowout of the market demand for portable handheld terminals, such as laptop computers, smart Mobile phones and tablet computers, etc., require higher integration and interconnection capabilities. In order to meet high-density interconnection, achieve higher integration, achieve high-frequency and high-speed performance of the system, and reduce transmission delay, the use of low dielectric constant dielectric materials (low K dielectric materials) is a very effective technology way. ...

AI Technical Summary

Problems solved by technology

[0003] Although low-K dielectric materials can significantly improve the transmission performance of high-frequency and high-speed systems, the development, process verification and reliability of low-K materials have a long cycle and cost.

As a typical architecture of high-frequency and high-speed systems, the integration based on silicon-based interposers has a mature process, but the relative dielectric constant of silicon is greater than 10, which will bring large transmission delays to high-speed systems

[0004] For the development, process verification and reliability of low-k materials, there are long periods and high costs, and the existing silicon-based adapter boards have problems such as large transmission delays caused by large dielectric constants. , the present invention proposes a silicon-based adapter plate structure with reduced equivalent dielectric constant and its preparation method, which reduces the equivalent dielectric constant of the silicon base, improves the transmission performance of the system, and does not change the material system of the process, Compatible with all existing processes, reducing costs and expanding the application scenarios of silicon-based interposers

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