A Biphase Coefficient Adjustable Analog Multiplication Calculation Circuit for Convolutional Neural Networks

Abstract

The invention discloses a convolutional neural network-oriented dual-phase coefficient adjustable analog multiplication calculation circuit, which belongs to the technical field of calculation, calculation and counting. The multiplication calculation circuit includes a current-type network digital-to-analog conversion module, a dual-phase coefficient adjustable analog multiplication array, a pipeline-type analog-to-digital conversion module, and a calculation unit control module. The discrete-time circuit structure is used to realize the multiplication calculation of the neural network layer, and a new The signed multiplier design provides positive control and negative control, which can realize multiplication with signed bits and provide a wider range of voltage amplitudes.

Description

technical field [0001] The invention discloses a convolutional neural network-oriented dual-phase coefficient adjustable analog multiplication calculation circuit, relates to digital-analog hybrid integrated circuit technology, and belongs to the technical field of calculation, calculation and counting. Background technique [0002] There are already many better optimized designs for the convolutional layers of today's convolutional neural networks, with significant effects in terms of power consumption, area, and energy efficiency. For example, methods such as quantization and compression are used in data storage to realize the binarization of convolutional neural networks; in computing circuits, exclusive NOR gates are used as approximate multipliers for convolution operations, etc. Therefore, the further optimized design of the convolutional layer in the field of reduced network layers and digital circuits has reached a bottleneck period. The convolutional neural network ...

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Problems solved by technology

[0003] In order to solve the problem that the further optimization design of the convolutional layer of the existing neural network has reached the bottleneck period, the present invention provides a neural network-oriented dual-phase coefficient adjustable analog multiplication circuit, which can convert the digital signal in the multiplication operation into For analog signals, the discrete-time circuit scheme is used to design the analog multiplication calculation circuit, which can reduce the calculation power consumption of the irregular network layer and achieve high linearity robustness. The design of the dual-phase coefficient switching circuit can widen the frequency response tuning range

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