FLASH chip with independent BOOT area, system and method
A technology of chips and implementation methods, applied in the field of improvement of FLASH chips, systems and methods, capable of solving problems such as crashes, complex software, and unsmooth startup, and achieving the effect of realization preparation
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[0024] The following will provide a more detailed description of the preferred embodiments of the present invention in conjunction with the accompanying drawings.
[0025] A kind of FLASH chip and system and method of setting independent BOOT area provided by the present invention, wherein said FLASH chip setting adopts described BOOT area to be set to be at least two, when being set to two, be set to have primary and secondary BOOT area , when there are more settings, there is a startup retrieval sequence. Sequentially set the start waiting time in each BOOT area, starting from the main boot area, after exceeding the start waiting time, jump to the next BOOT area to start, and wait in turn, if all BOOT areas cannot start If it is set to startup failure, it will display or prompt the information of startup failure.
[0026] The present invention takes PowerPC P1021 chip as example, the high-performance RICS (Reduced Instruction Set Computer, reduced instruction set computer) ...
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