FPGA online fault injection method based on code mutation

A technology of fault injection and coding, which is applied in the direction of faulty hardware testing methods, faulty computer hardware, instruments, etc., can solve the problem that users cannot freely choose faults, etc., and achieve the effect of improving efficiency and reducing collection

Inactive Publication Date: 2019-11-05
HARBIN INST OF TECH
View PDF3 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is: aiming at the problem in the prior art that users cannot freely select the faults they care about to inject to measure the reliability of the target system, a method for FPGA online fault injection based on code mutation is proposed

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FPGA online fault injection method based on code mutation
  • FPGA online fault injection method based on code mutation
  • FPGA online fault injection method based on code mutation

Examples

Experimental program
Comparison scheme
Effect test

specific Embodiment approach 1

[0030] Specific implementation mode one: refer to figure 1 Specifically illustrate this embodiment, the FPGA online fault injection method based on code mutation described in this embodiment, comprises the following steps:

[0031] Step 1: First scan the code and perform mathematical modeling on the VHDL system;

[0032] Step 2: According to the fault injection location selected by the user, inject file configuration, modify the signal, and generate an injection unit;

[0033] Step 3: Generate fault injection parameters according to the user's selection;

[0034] Step 4: Analyze the fault injection parameters generated in Step 3 and write them into the parameter register;

[0035] Step five: through the control of the host computer, the activation of the fault injection unit is completed when the FPGA target system is running.

[0036] The first step in the installation phase is to conduct code analysis, and conduct mathematical modeling of the VHDL system by scanning the c...

specific Embodiment approach 2

[0040] Embodiment 2: This embodiment is a further description of Embodiment 1. The difference between this embodiment and Embodiment 1 is that the fault injection location in Step 2 is realized through the syntax tree of the target system.

specific Embodiment approach 3

[0041] Embodiment 3: This embodiment is a further description of Embodiment 2. The difference between this Embodiment and Embodiment 2 is that the detailed steps of step 1 are:

[0042] Step 11: Code specification of the VHDL code file;

[0043] Step 1 and 2: Read the keyword list in the VHDL code, and use the basic keywords to segment the code;

[0044] Step 13: Determine whether all keywords have been scanned, if so, end, if not, then perform step 14;

[0045]Step 14: Read keywords to perform code matching in relevant segments, then write the information and matching positions into the data structure, and perform steps 1 and 3.

[0046] The recommended function of fault injection analyzes the reliability bottleneck of the system in the fault propagation network by constructing the fault propagation network of the system. The construction of the fault propagation network is divided into signal connections within a single file and signal connections between multiple files. ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses an FPG (Field Programmable Gate Array) online fault injection method based on code mutation, relates to the technical field of computer application, and aims to solve the problem that in the prior art, a user cannot freely select a fault concerned by himself/herself for injection to measure the reliability of a target system. The method comprises the following steps: 1, scanning a code, and carrying out mathematical modeling on a VHDL system; 2, according to a fault injection position selected by a user, file configuration is injected, the signal is modified, and an injection unit is generated; 3, generating a fault injection parameter according to the selection of the user; 4, analyzing the fault injection parameters generated in the step 3, and writing the fault injection parameters into a parameter register; and 5, completing activation of the fault injection unit during operation of the FPGA target system through control of the host machine. Through the fault injection recommendation function, the set of fault injection positions is effectively reduced. The fault injection efficiency can be effectively improved.

Description

technical field [0001] The invention relates to the technical field of computer applications, in particular to an FPGA online fault injection method based on code mutation. Background technique [0002] FPGA (Field-Programmable Gate Array), namely Field Programmable Gate Array, is based on the development of programmable logic devices such as PAL, GAL, and CPLD, and produces a semi-custom circuit in the field of application-specific integrated circuits. . [0003] With the increasingly close relationship between computer systems and industrial manufacturing and services, it is becoming more and more important to measure and evaluate the real reliability of FPGA systems, and the evaluation methods for system reliability mainly include: analytical model method, measurement method, benchmark program Among these methods, the reliability benchmark method is popular because of its flexibility, convenience, cheapness and effectiveness. The key to the reliability benchmark method i...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22G06F11/263
CPCG06F11/2273G06F11/263
Inventor 董剑任潇左德承孙日辉张展舒燕君罗丹彦
Owner HARBIN INST OF TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap