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Computing system of resistive memory

A computing system and memory technology, applied in the field of circuits, can solve problems such as consuming data bandwidth, and achieve the effect of large-scale parallel computing

Active Publication Date: 2019-10-29
ZHEJIANG UNIV
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

Both consume limited data bandwidth (bus resources) and computing resources in the computing system

Method used

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  • Computing system of resistive memory
  • Computing system of resistive memory
  • Computing system of resistive memory

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Embodiment Construction

[0027] In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and which show by way of illustration specific embodiments in which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. For example, features illustrated or described with respect to one embodiment can be used or combined with other embodiments to yield a still further embodiment. It is intended that the present invention include such modifications and variations. The embodiments are described using specific language which should not be construed as limiting the scope of the appending claims. The drawings are not drawn to scale and are for illustration purposes only.

[0028] In this embodiment, for figure 1 , 2, 3 explain the method of use.

[0029] The resistive memory is a storage unit of a magnetic random ac...

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Abstract

The invention discloses a computing system of a resistive memory. In a neural network and scientific calculation, a large number of matrix operations need to be carried out, so that a large number ofdata needs to be transported, and a large number of operations needs be carried out on the data, which consume limited data bandwidth (bus resources) and computing resources in the computing system. The memory is reconstructed into a calculation module, so that the calculation capability and the data bandwidth are greatly improved. The AND-XOR operation and the analog multiplication operation arerealized by utilizing the grid control capability of the transistor and the current modulation capability of the resistance value of the memory. The reconstruction can greatly reduce the calculation cost, thereby enhancing the calculation capability of natural tasks with parallelism, such as a neural network and the like. Due to the fact that complete Boolean logic can be formed through AND and XOR, complete Boolean logic can be achieved.

Description

technical field [0001] The present invention is generally in the field of circuits and, more particularly, relates to memory-based computing systems. Background technique [0002] In neural network and scientific computing, a large number of matrix operations are required, which will bring a large amount of data handling and a large number of operations on the data. Both consume limited data bandwidth (bus resources) as well as computing resources in the computing system. Since data transfer will generate a lot of heat, within a limited chip area, the limited heat dissipation determines the upper limit of data transfer, which is the so-called memory wall. In large-scale data computing, the upper limit of this data handling further determines the upper limit of the data computing scale. [0003] Aiming at the two limitations of computing resources and data bandwidth resources, many solutions have been proposed. In view of the limitation of computing resources, people have ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/16G11C13/00
CPCG06F17/16G11C13/0038G11C13/004G11C13/0069G11C2013/0088
Inventor 赵毅高世凡陈冰
Owner ZHEJIANG UNIV
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