Time-triggered Ethernet clock synchronization method based on crystal oscillator frequency digital compensation

Abstract

The invention discloses a time-triggered Ethernet clock synchronization method based on crystal oscillator frequency digital compensation, relates to the technical field of clock synchronization of adistributed communication network, and solves the problem of frequency deviation calibration in a clock synchronization process. According to the method, a clock trigger Ethernet model is establishedbased on an SAE AS6802 protocol, and a clock synchronization process is simulated through network calculation. A VerilogHDL tool is adopted to design crystal oscillator frequency-temperature characteristic curve lookup table and improved local clock module comprising crystal oscillator frequency digital compensation module, and is applied to a network node hardware model. The local clock module isimproved to occupy less hardware cost, the digital frequency deviation of the crystal oscillator is compensated, the network clock synchronization precision is effectively improved, and the method can be widely applied to an aerospace electronic system and a vehicle-mounted control system.

Description

technical field [0001] The invention relates to the technical field of clock synchronization of a distributed communication network, in particular to a time-triggered Ethernet clock synchronization method based on crystal frequency digital compensation and a hardware structure design scheme of each network node model. Background technique [0002] Time-triggered Ethernet combines real-time performance and fault tolerance with the flexibility and high speed of ordinary Ethernet, providing support for aerospace electronic systems, automatic driving and other control fields. As a distributed communication network, it carries the operation of key information such as task scheduling, timing control, and data transmission in the system. Its real-time performance and stability have an important impact on the completion of measurement and control tasks. [0003] In time-triggered Ethernet, the SAE AS6802 protocol formulates a time-triggered mechanism to establish a globally unified ...

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Problems solved by technology

[0007] The purpose of the present invention is to solve the problem that network nodes enter an asynchronous state due to frequency deviation in the synchronization process of time-triggered Ethernet clocks, using Opnet network calculation tools to establish a time-triggered Ethernet model based on the SAEAS6802 protocol, and the simulation results Synchronize time information; use VerilogHDL to design the hardware of the network node model established in Opnet, design a crystal oscillator frequency digital compensation module in the node local clock module, compensate the crystal oscillator frequency deviation according to the temperature of the node's environment, eliminate the crystal oscillator frequency deviation, and improve Time-triggered Ethernet clock synchronization accuracy

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