Translator device

A technology for translators and devices, applied in the field of translator devices, can solve problems such as compromising performance parameters, and achieve the effects of improving performance, reducing the number of pins, realizing redundant calculation or error correction

Inactive Publication Date: 2019-07-19
济南德欧雅安全技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Unfortunately, due to being on the same chip, this signal processing circuit has to be implemented in the same poor CMOS technology, in order to compromise performance parameters such as speed and power consumption

Method used

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Embodiment Construction

[0045] In order to clearly illustrate the technical features of the present solution, the present invention will be described in detail below through specific implementation methods and in conjunction with the accompanying drawings. The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and / or letters in different instances. This repetition is for the purpose of simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. It should be noted that components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and processes are omitted herein to avoid unnecessarily lim...

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PUM

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Abstract

The invention provides a translator device. Through inserting a translator chip between a memory component and an external application program, the translator chip is added to the completed DRAM or other memory components, and a passive device is added to the additional substrate of the translator device, so that the performance of the overall memory component is improved, and the number of pins of the overall system of the memory component is reduced. In addition, the translator device performs repair by detecting faulty row or column address lines, replacing the faulty row or column addresslines with a good redundant row or column line, or storing replacement data by providing a register on the translator chip to achieve redundant computation or error correction.

Description

technical field [0001] The invention relates to the field of semiconductor integration, in particular to a translator device. Background technique [0002] Dynamic random access memory DRAM and flash memory technology have been developed for many years. The basic technology of DRAM and Flash remains basically the same, but the interface is constantly updated over time, such as fast page mode (FPM), extended data output (EDO), Synchronous DRAM (SDRAM), Double Data Rate 1-4 (DDR1, DDR2, DDR3, DDR4), etc. [0003] figure 1 The basic architecture of DRAM is shown. An externally supplied row address is decoded and results in the activation of a word line WL, eg, connected to the gates of 8192 individual memory cells. This will start a sensing process, amplify those weak signals, such as 8192 individual memory cells, and save them in the sense amplifier SA. [0004] Afterwards, the column address will be provided sequentially after the row address through the same external add...

Claims

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Application Information

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IPC IPC(8): G11C29/00
CPCG11C29/76G11C29/785G11C29/787G11C29/816
Inventor 濮必得殷和国赵修金
Owner 济南德欧雅安全技术有限公司
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