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Semiconductor device

A technology for semiconductors and equipment, applied in the field of semiconductor equipment, can solve the problems of deterioration of retention characteristics and reduced yield, and achieve the effect of reducing power consumption

Pending Publication Date: 2019-07-19
RENESAS ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0010] On the other hand, with the increase in transistor leakage associated with the refinement of the semiconductor process, and due to manufacturing dispersion of transistors used for data comparison and variations in leakage due to aging degradation, there is an increase in the supply voltage (VDD ) (i.e., the "H" level state) degradation of the retention characteristics lead to the problem of lower yield

Method used

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  • Semiconductor device
  • Semiconductor device
  • Semiconductor device

Examples

Experimental program
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Effect test

no. 1 example

[0034]

[0035] figure 1 is a diagram showing the configuration of the communication device 1 based on the first embodiment.

[0036] like figure 1 As shown, the communication device 1 is a communication device such as a switch or a router.

[0037] The communication device 1 includes a CPU (Central Processing Unit) 2 , a transmission control circuit 4 , a general-purpose memory 6 and a retrieval memory 8 .

[0038] CPU 2 controls the entire device.

[0039] The CPU 2 realizes various functions in cooperation with programs stored in the general-purpose memory 6 . For example, the general-purpose memory 6 may be configured with DRAM (Dynamic Random Access Memory) to establish an operating system (OS) in cooperation with the CPU 2 . The CPU 2 maintains and manages information necessary for transmission processing by exchanging information with adjacent communication devices and the like.

[0040] The transmission control circuit 4 executes transmission processing of com...

no. 2 example

[0115] Figure 7 is a diagram showing the configuration of a matching amplifier module based on the second embodiment.

[0116] like Figure 7 As shown, matching amplifiers are provided for each entry.

[0117] This example shows a case where a plurality of matched amplifiers (MA#0 to MA#(N−1)) are provided corresponding to each of a plurality of entries (entry 0 to entry (N−1)).

[0118] All matching amplifiers (MA#0 to MA#(N-1)) have the same configuration. Note that the matched amplifiers (MA#0 to MA#(N−1)) are also collectively referred to as matched amplifier MA#.

[0119] Similar to the first embodiment, each entry includes 40 memory cells MC and dummy memory cells DMC. The dummy memory cell DMC stores information on the retention characteristics of the potential of the corresponding match line ML.

[0120] The matching amplifier MA# includes an amplifier AP for amplifying data of the match line ML, a P-channel MOS transistor PT1 as a precharge circuit, a match-line...

no. 3 example

[0141] In recent years, the demand for a high-capacity retrieval system is increasing, and the layout area of ​​the retrieval memory 8 is also increasing.

[0142] Figure 9 is a diagram showing a plurality of sections included in the retrieval memory 8 based on the third embodiment.

[0143] like Figure 9 As shown, this example shows an array configuration of 320 bits x 4k entries.

[0144] N blocks are provided.

[0145] Each of the blocks (0 to N-1) is provided with 8 sectors 12, each of the 8 sectors 12 has 40 bits x 128 entries.

[0146] In the third embodiment, information for selectively activating the match line holding circuit 50 is stored in the register 70 . The register 70 includes a plurality of storage modules 71 . The storage module 71 stores information to determine whether the match line hold circuit 50 is to be activated for each block.

[0147] In other words, when information is stored in the storage module 71 with respect to the block (block 0), all...

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Abstract

The present invention provides a semiconductor device that can reduce the power consumption, including: a plurality of search memory cells arranged in a matrix; a plurality of match lines provided corresponding to each memory cell row to determine match / mismatch between data stored in the search memory cell and search data; a plurality of match line retention circuits provided corresponding to each of the match lines; a storage unit for storing information relating to the state of each of the match lines; and a selection circuit for selectively activating the match line retention circuits based on the information stored in the storage unit.

Description

[0001] Cross References to Related Applications [0002] The disclosure of Japanese Patent Application No. 2017-229304 filed on November 29, 2017 including specification, drawings and abstract is incorporated herein by reference in its entirety. technical field [0003] The present invention relates to semiconductor devices and, for example, to associative memories. Background technique [0004] A storage device called an associative memory or CAM (Content Addressable Memory) is a device that retrieves a word matching a keyword from stored data words and outputs an address when a matching data word is found. [0005] There are two types of CAMs: BCAM (binary CAM) and TCAM (ternary CAM). Each memory cell in the BCAM stores information of "0" or "1". On the other hand, in the case of TCAM, each memory cell can store information of "don't care" ("*" is used in this example) in addition to "0" and "1". The "*" symbol indicates that both "0" and "1" are acceptable. [0006] ...

Claims

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Application Information

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IPC IPC(8): G11C15/04
CPCG11C15/04G11C29/025G11C29/4401G11C29/70G11C2029/4402G11C29/38G11C29/44
Inventor 伊贺上太
Owner RENESAS ELECTRONICS CORP
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