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PCIe pressure eye pattern test calibration method

An eye diagram and stress technology, applied in the computer field, can solve the problems of insufficient signal-to-noise ratio and calibration failure of oscilloscope, and achieve the effect of solving the problem of insufficient signal-to-noise ratio, enhancing flexibility and saving calibration time.

Active Publication Date: 2019-05-17
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In view of this, the purpose of the embodiment of the present invention is to propose a PCIe stress eye diagram test calibration method, by using the method of the present invention can solve the problem of calibration failure due to insufficient signal-to-noise ratio of the oscilloscope in the traditional calibration method, while saving Calibration time for enhanced calibration flexibility

Method used

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  • PCIe pressure eye pattern test calibration method

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Embodiment

[0042] The embodiment of the present invention is to test and calibrate the receiver stress eye diagram at the PCIe3.0 8G rate chip end, and use seasim software for simulation. Specific implementation steps:

[0043] 1. Use a network analyzer to test the loss from the signal input point of the loss calibration board to the output point of the image channel on the device under test, and ensure that the IL is within 20dB+ / -2dB, and save the test results as an S parameter file for later simulation.

[0044] 2. Preheat BERT and oscilloscope until the temperature of the instrument is stable. Record the noise floor V of the oscilloscope test results at this time nosc .

[0045] 3. Connect BERT directly to the oscilloscope, such as image 3 As shown, use the automatic calibration program that comes with BERT to calibrate the accuracy and linearity of SJ, RJ, and DM-SI, connect the oscilloscope directly to the oscilloscope, and use the calibration program that comes with BERT to co...

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Abstract

The PCIe pressure eye diagram test calibration method comprises the steps of obtaining a loss value from a loss calibration board signal input point in a test link to a mirror image channel output point on to-be-tested equipment, and storing a channel characteristic obtained based on the loss value as an S parameter file; Performing eye diagram simulation according to the S parameter file, and using parameter values meeting PCIe bus protocol requirements in the eye diagram simulation; Adjusting parameter values in the eye diagram simulation until a pressure eye diagram result meeting PCIe busprotocol requirements is obtained, and recording the adjusted parameter values; And configuring the adjusted parameter values into an error rate tester for pressure eye diagram testing. By using the PCIe pressure eye diagram test calibration method provided by the invention, the problem of calibration failure caused by insufficient signal-to-noise ratio of an oscilloscope in the traditional calibration method can be solved, the calibration time is saved, and the calibration flexibility is enhanced.

Description

technical field [0001] This field relates to the field of computers, and more particularly to a PCIe stressed eye diagram test calibration method. Background technique [0002] At present, the PCIe bus is widely used as a high-speed serial bus in computers, servers, switches, routers and other equipment. In order to ensure the consistency of the design, it is necessary to verify the receiving channel and receiver of PCIe in the system. Stressed eye diagram test is an important test method for serial bus receiving link and receiver consistency. Such as figure 1 , the specific principle is to use BERT (bit error rate tester) to generate the stress eye diagram signal defined by the bus protocol, send the signal to the test point defined by the bus protocol, and the signal passes through the receiver link to be tested from this position , and finally reach the receiver under test. Configure the interface to be tested to enter the loopback mode, and the BERT receives the signa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22
Inventor 李奇
Owner ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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