Digital Accurate Delay Matching Circuit

Abstract

The invention discloses a digital precise time delay matching circuit, which is used for the time delay matching adjustment of an adaptive interference cancellation device in the 2MHz-500MHz short-wave and ultra-short wave band, including an ADC sampling unit, a clock generator unit, a data synchronization unit and FPGA delay unit. Delay matching adjustment is based on delayed clock sampling technology, by applying sampling clocks of different phases to the sampling ADC, and then implementing data synchronization to achieve delay matching of different paths. Combining the fine sampling clock delay characteristics of the clock generator unit and the large-scale coarse delay adjustment characteristics of the FPGA delay unit, this circuit can realize large-scale, high-precision delay matching adjustment, and the adjustment accuracy is within 55ps.

Description

technical field [0001] The invention relates to the technical field of radio frequency equipment, in particular to a digital precise time delay matching circuit. Background technique [0002] Modern communication platforms integrate numerous radio frequency equipment such as communication, navigation, radar, electronic warfare, etc. High-power transmitters and high-sensitivity receivers need to work on the same platform. The transceiver antennas of the device are densely distributed on the platform, and the complex coupling relationship between the antennas leads to the increasingly prominent electromagnetic compatibility problem of each device inside the platform. When the high-power transmitter is working, due to the limited isolation of the transceiver antenna, a large interference signal will be generated on the adjacent receiver, and in severe cases, the receiver will be blocked or even damaged. [0003] The adaptive interference cancellation technology based on orthog...

AI Technical Summary

Problems solved by technology

Fixed delay devices, which can be implemented using PCB transmission lines or dedicated passive delay line devices, have the advantage of high passable frequency bands, but due to the fixed delay value, poor adjustability and poor versatility

Adjustable delay, adjustable delay, flexible use, but the frequency band is narrow, the adjustable range is limited, the adjustable accuracy is limited, and the delay adjustment is very inconvenient by manually adjusting the knob

Whether it is a fixed delayer or an adjustable delayer, it is impossible to simultaneously meet the delay matching requirements of a high applicable signal frequency band ≥ 500MHz, a wide adjustable delay range, microsecond adjustable levels, and a high adjustable delay accuracy within 55.6ps.

At present, no patent or literature has been found to discuss the design of delayers that meet the delay matching requirements

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