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Aging test method and system for high speed switch chip

A technology of aging test and high-speed switching, which is applied in the direction of electronic circuit testing, measuring electricity, measuring devices, etc., can solve the problem of not covering the analog part of the integrated circuit, and achieve the effect of comprehensive coverage.

Inactive Publication Date: 2019-02-15
TIANJIN CHIP SEA INNOVATION TECH CO LTD +1
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In view of this, the present invention provides a high-speed switching chip aging test method and system to overcome the problem that the existing integrated circuit aging method cannot cover the analog part of the integrated circuit

Method used

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  • Aging test method and system for high speed switch chip
  • Aging test method and system for high speed switch chip
  • Aging test method and system for high speed switch chip

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Embodiment Construction

[0020] It should be noted that the embodiments of the present invention and the features in the embodiments can be combined with each other if there is no conflict.

[0021] Such as figure 1 As shown, in the dynamic aging test, the present invention performs high temperature and voltage pull bias tests on the tested IC, performs digital pin pull-up and pull-down operations on the digital part, performs loopback test on high-speed serdes, and performs packet sending and receiving on the switch module test.

[0022] Such as figure 2 As shown, the test process of the present invention is:

[0023] (1) Power-on reset test;

[0024] (2) Read and write register test;

[0025] (3) Digital IO flip test;

[0026] (4) High-speed serdes loopback test;

[0027] (5) Switch module receiving and sending package test.

[0028] Among them, the high temperature test is to put the burn-in board in the burn-in box, and perform the burn-in high-temperature test by adjusting the temperature of the burn-in box...

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Abstract

The invention provides an aging test method and system for a high-speed switch chip, characterized by placing an IC under test in an aging board in a dynamic aging test; providing an excitation signalfor the aging board through a control board; performing high temperature and voltage pull tests on the IC under test; performing a digital pin pull-down operation on a digital part of the IC under test; performing a loopback test on an simulation part of the IC under test; and performing transmission and reception tests on a switch module of the IC under test. According to the aging test method and system for the high-speed switch chip, the aging test of the digital part, the simulation part, and the switch part of the high speed switch chip can be realized, and the aging screening test itemsfor early failure products are covered more comprehensively, thereby facilitating to discover more potential problems during the aging test. In addition, the aging resistance of each functional module can be found in time by monitoring and displaying the results of various functional test items of high-temperature dynamic aging in real time, and the test results are analyzed by storing aging information in real time.

Description

Technical field [0001] The invention belongs to the field of chip testing, and particularly relates to an aging test method and test system for high-speed switching chips. Background technique [0002] As semiconductor integrated circuits are widely used in various fields related to communications, electronics, and computers, and their volume is developing in the direction of light, thin, and small, the reliability of integrated circuits has also attracted more and more people's attention. In special occasions such as military weapon systems, aerospace electronic equipment, industrial control, etc., the reliability of integrated circuits occupies a very important position, and its importance is even as important as the performance indicators of the integrated circuits themselves. Aging test includes static test and dynamic test. Static test is to apply temperature stress, voltage and current stress to the device under test. Dynamic aging test is to apply dynamic excitation signal...

Claims

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Application Information

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IPC IPC(8): G01R31/28
CPCG01R31/2817
Inventor 李杨沈剑良宋克吕平刘勤让张波王永胜张进李沛杰杨堃王锐赵玉林毛英杰虎艳宾张霞
Owner TIANJIN CHIP SEA INNOVATION TECH CO LTD
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