SiC MOSFET device with good third quadrant performance

Abstract

The invention provides a SiC MOSFET device with good third quadrant performance, comprising an N-type substrate, an N-type epitaxial layer, a P- Body region, an N-type accumulation layer, an N + contact region, an oxide layer, a side gate, a metal electrode and a drain electrode. That SiC MOSFET device provide by the invention can improve the performance of the third quadrant of the SiC MOSFET, realize low reverse turn-on voltage and conduction loss, and avoid the problem of bipolar degradation. When the device is turned off, P-Body region can not only shield the electric field at the chamferof groove gate, but also protect the Schottky interface at the bottom of groove, which can effectively restrain the phenomena of excessive electric field at these two places, and improve the overall electrical characteristics and reliability of the device, the introduction of N-type accumulation layer and JFET pinch-off between the P-body regions effectively improves the short-circuiting capability of the device.

Description

technical field [0001] The invention belongs to the field of electronic science and technology, and mainly relates to power semiconductor device technology, in particular to a SiC MOSFET device with good third-quadrant performance. Background technique [0002] The wide bandgap semiconductor material SiC is an ideal material for preparing high-voltage power electronic devices. Compared with Si materials, SiC materials have a high breakdown electric field strength (4×10 6 V / cm), high carrier saturation drift velocity (2×10 7 cm / s), high thermal conductivity (490W / Mk), good thermal stability, etc., so it is especially suitable for high-power, high-voltage, high-temperature and radiation-resistant electronic devices. [0003] MOSFET is the most widely used device structure in SiC power devices. Compared with bipolar devices, SiC MOSFET has lower switching loss and higher frequency characteristics because it has no charge storage effect. [0004] Due to the poor interface stat...

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Problems solved by technology

[0007] In order to optimize the performance of the third quadrant of SiC MOSFET devices and avoid bipolar degradation, and at the same time avoid the problem of excessive leakage current in the blocking state caused by the integration of the integrated Schottky interface electric field, the present invention proposes an integrated Schottky at the bottom of the groove. Diode-based SiC MOSFET devices

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