Integrated circuit memory and forming method thereof, semiconductor integrated circuit device
A technology of integrated circuits and memory, which is applied in the field of semiconductor integrated circuits, and can solve problems such as resolution limitations of memory lithography equipment
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Embodiment 2
[0164] Figure 4 It is a schematic flow chart of the forming method of the memory in Embodiment 2 of the present invention, refer to Figure 4 As shown, in this embodiment, the forming method of the memory includes:
[0165] Step S100, providing a substrate, and forming a plurality of bit lines on the substrate, the bit lines extending along a first direction;
[0166] Step S200, forming a plurality of active pillars on the bit line, the bottom ends of the active pillars are connected to the bit lines, and the cross-sectional size of the bottom ends of the active pillars is a cross-sectional dimension smaller than the top end of the active pillar such that the bottom end is recessed relative to the top end;
[0167] Step S300, forming a plurality of word lines on the substrate, the word lines extending along the second direction, the word lines are integrally connected in the extending direction and configured with a plurality of upright gate transistors, the The gate trans...
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