Test Method for Microprocessor Single Event Flip Cross Section

Abstract

Aiming at the problem that existing microprocessor single event upset section test methods cannot comprehensively and correctly reflect sensitive degrees, to single event upset effects, of microprocessors, the invention discloses a microprocessor single event upset section test method. The method comprises the following steps of: 1, constructing a single event upset test system; 2, designing an instruction set traversal program, an internal memory cyclic traversal program and a data moving program; 3, testing a single event upset section C1 when a tested microprocessor operates the instructionset traversal program; 4, testing a single event upset section C2 when the tested microprocessor operates the internal memory cyclic traversal program; 5, testing a single event upset section C3 whenthe tested microprocessor operates the data moving program; and 6, calculating an overall single event upset section C=C1+C2+C3 of the tested microprocessor. The method is capable of comprehensivelyand correctly reflecting sensitive degrees, to single event upset effects, of tested microprocessors in normal work, and improving the accuracy of microprocessor single vent upset effect test.

Description

technical field [0001] The invention relates to the field of single-event effect testing, in particular to a testing method for a microprocessor single-event flip section. Background technique [0002] Modern microprocessors have been more and more widely used in aviation and aerospace fields due to their high integration, strong computing power, and rich IO interfaces. However, modern microprocessors used in harsh radiation environments such as aviation and spaceflight are easily affected by Single-Event Upset (SEU) and cause errors, resulting in immeasurable losses. [0003] With the advancement of technology levels, modern microprocessors generally have the characteristics of a system on chip (System on Chip, SoC). First of all, complex microprocessor cores are often integrated on the chip, with numerous calculation and acceleration units, such as arithmetic operation unit (Arithmetic Logical Unit, ALU), floating point operation unit (Float Point Unit, FPU), advanced enc...

AI Technical Summary

Problems solved by technology

[0008] The technical problem solved by the present invention is: aiming at the problem that the existing microprocessor single event inversion cross-section test method cannot comprehensively and accurately reflect the sensitivity of the microprocessor to the single event inversion effect, a method for the single-event inversion cross-section of the microprocessor is proposed The test method can not only comprehensively test the sensitivity of the tested microprocessor to the single event upset effect, but also truly and accurately reflect the sensitivity of the microprocessor to the single event upset effect when it is working normally, and improve the single event upset effect of the microprocessor. The precision of the effect test

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