FPGA (field programmable gate array) data processing method and FPGA data processing system based on novel CHSI (crypto host serial interface) optimization

Abstract

The invention belongs to the field of processing of identification-friend-or-foe digital signals in western systems, and relates to an FPGA (field programmable gate array) data processing method and an FPGA data processing system based on novel CHSI optimization. The problems such as high error rate, low data transmission reliability and low real-time processing efficiency in the prior art are solved. The FPGA data processing method mainly includes designing a high-precision differential local oscillation clock source according the characteristics of CHSI output and input time sequence processing; generating a basic clock of the CHSI output and input time sequence processing by an internal clock phase-locked loop of an FPGA; according to a given CHSI transmission circuit and a time sequence processing optimization method, and based on time sequence characteristics, data frame structures and status switching control, processing data of CHSI input and output time sequences.

Description

technical field [0001] The invention belongs to the field of IFF digital signal processing in the western system, relates to an FPGA data processing method and system, in particular to an FPGA data processing method and system based on novel CHSI interface optimization. Background technique [0002] In modern information warfare, traditional IFF combat platforms are faced with a more complex electromagnetic environment and increasing target threats, and their survivability and combat performance are severely challenged and tested. In order to cope with this situation, NATO countries regard the anti-jamming performance and high security performance of combat platforms as the technical development direction. After the Gulf War and the Iraq War, the development direction of the identification friend or foe system in the western system has shifted its research focus from the traditional "ground-to-air" and "air-to-air" identification to the identification system of the joint com...

AI Technical Summary

Problems solved by technology

[0006] The technical problem to be solved by the present invention is to provide a novel CHSI interface-based FPGA data processing method and system based on the above-mentioned problems. Firstly, a high-precision differential local oscillator clock is designed according to the characteristics of CHSI interface output and input timing processing. source; then the internal clock phase-locked loop of the field programmable logic array FPGA generates the basic clock for CHSI interface output and input timing processing; finally, according to the given CHSI interface transmission circuit and timing processing optimization method, combined with timing characteristics and data frames Structure and state transition control, respectively process the CHSI interface output and input timing data, thus greatly improving the problems of high bit error rate, data transmission reliability and real-time processing efficiency in the prior art, and reducing bit errors rate, improving data transmission reliability and real-time processing efficiency

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