Current sampling circuit applied to boost-buck circuit and control method thereof

Abstract

The invention discloses a current sampling circuit applied to a boost-buck circuit and a control method thereof. The boost-buck circuit comprises a reference field, a first MOS (Metal-Oxide-Semiconductor) transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor and an inductor; the current sampling circuit comprises a first current sampling circuit, a second current sampling circuit and a current processing circuit; the first sampling circuit is used for sampling current flowing through the first MOS transistor to obtain first sampling current; the second sampling circuit is used for sampling current flowing through the fourth MOS transistor to obtain second sampling current; the current processing circuit is used for generating third sampling current accordingto the first sampling current and the second sampling current; and the average value of the third sampling current in one circuit working period represents the output current of the boost-buck circuit. Compared with the prior art, the current sampling circuit has the advantages that the current sampling function inside a chip is realized; the power loss and chip pin quantity are reduced; and the system cost is lowered.

Description

technical field [0001] The present invention relates to an electronic circuit, specifically but not limited to a current sampling circuit applied to a buck-boost circuit and a control method thereof. Background technique [0002] In order to sample the output current information of the buck-boost circuit (Buck-Boost circuit), the traditional method usually connects an external resistor in series for current sampling. Such as figure 1 Shown is a current sampling circuit of a traditional Buck-Boost circuit, including the first MOS transistor (metal oxide semiconductor field effect transistor) SWA, the second MOS transistor SWB, the third MOS transistor SWC, the fourth MOS transistor SWD, and the inductor L and the sampling resistor Rs, wherein the sampling resistor Rs is coupled to the drain of the fourth MOS transistor SWD, the output current Iout of the circuit can be calculated by obtaining the voltage Vs across the resistor Rs, but the external resistor Rs in this samplin...

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Problems solved by technology

like figure 1 Shown is a current sampling circuit of a traditional Buck-Boost circuit, including the first MOS transistor (metal oxide semiconductor field effect transistor) SWA, the second MOS transistor SWB, the third MOS transistor SWC, the fourth MOS transistor SWD, and the inductor L and the sampling resistor Rs, wherein the sampling resistor Rs is coupled to the drain of the fourth MOS transistor SWD, the output current Iout of the circuit can be calculated by obtaining the voltage Vs across the resistor Rs, but the external resistor Rs in this sampling method It will increase the power loss, and the circuit chip needs to add two sampling pins for the access of the resistor Rs, which increases the cost of the system

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