A high-speed serial transceiver interface circuit

Abstract

An interface circuit of a high-speed serial transceiver comprises an FPGA chip with serial communication drive, the FPGA chip is connected with an interface, and the interface circuit is characterizedin that an output port and an input port of the FPGA chip are connected with a first isolation circuit and a second isolation circuit respectively. By the adoption of the isolation circuits and namely a mutual inductor isolation mode, isolation voltage can be greatly increased; meanwhile, anti-interference capacity is promoted, the interface circuit is prone to being interfered by an external electric field in an original capacitor isolation mode, after the original capacitor isolation mode is changed into the mutual inductor isolation mode, original coaxial cable transmission media are changed into twisted-pair media, and transmission distance is greatly increased.

Description

technical field [0001] The invention relates to the field of serial communication, in particular to a high-speed serial transceiver interface circuit. Background technique [0002] The original serial communication device needs to use the isolation circuit to realize the effect of isolation voltage. The original isolation circuit uses the capacitive isolation method, but due to the high-speed transmission characteristics of the serial communication SERDES, it is necessary to choose a capacitor with low withstand voltage and low loss angle. Therefore, the isolation voltage in most occasions cannot meet the requirements, and the application is limited, and the original capacitance isolation method is easily disturbed by the external electric field. Contents of the invention [0003] In order to solve the technical problem that the isolation voltage of the capacitive isolation mode of the high-speed serial transceiver in the prior art cannot meet the requirements, the present...

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Problems solved by technology

[0002] The original serial communication device needs to use the isolation circuit to realize the effect of isolation voltage. The original isolation circuit uses the capacitive isolation method, but due to the high-speed transmission characteristics of the serial communication SERDES, it is necessary to choose a capacitor with low withstand voltage and low loss angle. Therefore, the isolation voltage of most occasions cannot meet the requirements, and the application is limited, and the original capacitance isolation method is easily disturbed by the external electric field

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