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Physical unclonable function circuit structure based on multiple bunching delay

A functional circuit and grouping technology, which is applied in the field of physical unclonable function circuit structure, can solve the problems of poor uniqueness, insufficient stability, and insufficient performance of physical unclonable functions.

Inactive Publication Date: 2017-09-05
ZHEJIANG UNIV
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, due to the uniqueness problems caused by non-random system errors and the stability problems caused by environmental factors, the performance of physical unclonable functions as IDs is insufficient. There are currently some optimization techniques
Most methods have shortcomings such as insufficient stability and poor uniqueness

Method used

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  • Physical unclonable function circuit structure based on multiple bunching delay
  • Physical unclonable function circuit structure based on multiple bunching delay

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Embodiment Construction

[0012] The present invention will be further described below in conjunction with the accompanying drawings.

[0013] refer to figure 1 and figure 2 , a physical unclonable function circuit structure based on multiple group delays, using multiple group delay units to realize self-correcting and unique physical unclonable functions, mainly includes the following three parts: multiple grouping Time-delay variable source module (1), fuzzy extractor module (2) and entry recurrence module (3) (see figure 1 ).

[0014] Multiple Packetized Delay Variable Source Module (1), containing 2 N Multiple grouped delay variable units (4), a 2 N Select 1 selector (5) and a delay variability quantizer (6), obtain the quantization result of the delay variability of the corresponding multiple grouped delay variable unit (4) according to the input excitation signal, obtain source response. Multiple grouping delay variable units (4) comprise 2*k+1 grouping delay units (11), and each grouping ...

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Abstract

The invention discloses a physical unclonable function circuit structure based on multiple bunching delay. The physical unclonable function circuit structure includes a variable-source multiple bunching delay module, a fuzzy extractor module and a logging and recurrence module; a multiple bunching delay unit and a fuzzy extractor which is based on linear codes and a hash function family are adopted, and physical unclonable functions which are high in stability and uniqueness are achieved.

Description

technical field [0001] The invention relates to a method for realizing circuit identification through device manufacturing variability, in particular to a physically unclonable function circuit structure based on multiple group delays. Background technique [0002] With the wide application of ID cards, there are various ways to generate IDs, among which physical unclonable function (PUF) stands out because of its characteristics of being unclonable and easy to implement. At the end of the 19th century, some scholars began to use the idea of ​​biometrics for reference, and used random patterns on paper and optical marks as anti-counterfeiting marks for important items such as currency. Later, electronic PUFs were realized by using integrated circuits, the core of which is the inherent randomness in the manufacturing process of integrated circuits, which is generated by the inevitable process deviation in the manufacturing process. [0003] However, due to the uniqueness pro...

Claims

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Application Information

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IPC IPC(8): G06F21/77
CPCG06F21/77
Inventor 沈海斌孙世春李卫平
Owner ZHEJIANG UNIV
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