Wear leveling perception-based non-volatile memory encryption system

Abstract

The invention discloses a wear leveling perception-based non-volatile memory encryption system. The system comprises a storage region, a counter cache, an encryption engine and a wear leveling module, wherein the counter cache is used for caching a row counter and a region counter; the encryption engine is used for generating a one-time key according to the row counter, the region counter, a physical row address and a global key; and for each sub storage region, the wear leveling module is used for reading out old ciphertext data in a physical row of the sub storage region when the frequency of executing a writing request in the sub storage region reaches a preset threshold, performing XOR on the old ciphertext data and the one-time key to obtain new ciphertext data and finally writing the new ciphertext data into a new physical row to finish remapping operation. The key and the ciphertext data are updated by utilizing the remapping operation of the wear leveling module, and finally the purpose of ensuring security by utilizing relatively few counters, so that the storage and performance costs of non-volatile memory encryption are reduced.

Description

technical field [0001] The invention belongs to the technical field of solid-state storage, and more specifically relates to a wear leveling-aware non-volatile memory encryption system. Background technique [0002] In the past ten years, with the rapid increase in the number of core units in the processor, more and more threads can be executed in parallel in the computer system, which puts extremely high requirements on the capacity, performance and power consumption of the memory system. Traditional DRAM (Dynamic Random Access Memory, DRAM) faces the constraints of poor scalability and increased leakage power consumption when the process size is reduced, and cannot meet the future development needs of multi-core technology. Furthermore, technologies such as new non-volatile memory (Non-Volatile Memory, NVM), such as phase change memory (Phase Change Memory, PCM) and resistive random access memory (Resistive Random Access Memory, RRAM) are used to alleviate the problems fac...

AI Technical Summary

Problems solved by technology

This solves the technical problem of excessive counter overhead in the prior art for existing counter mode encryption methods

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