Array substrate and liquid crystal panel provided with same

Abstract

The invention provides an array substrate and a liquid crystal panel provided with the same. The array substrate comprises a virtual pixel area, a display area and a drive circuit area, wherein the virtual pixel area is located between the display area and the drive circuit area; polycrystalline silicon lines and gate lines which are intercrossed at different planes are arranged in the display area and the virtual pixel area, wherein the noncoplanar overlapped area of the polycrystalline silicon lines and the gate lines in the virtual pixel area is larger than thatof the polycrystalline silicon lines and the gate lines in the display area. The array substrate can release static voltage effectively and greatly reduce static voltage which is probably transmitted to the display area along the gate lines and prevents damage to the pixel function of the display area.

Description

technical field [0001] The invention belongs to the field of electrical protection, and in particular relates to an array substrate capable of effectively releasing static voltage and a liquid crystal panel with the array substrate. Background technique [0002] During the manufacturing process of liquid crystal panel devices or when working within a certain range of voltage, current and power consumption, a large number of accumulated static charges will generate high-voltage discharge when the conditions are suitable, and electrostatic discharge (ESD, Elctro-Static Discharge) passes through the circuit device The instantaneous high voltage transmission of the lead may cause the breakdown of the insulation layer of the circuit device, resulting in the loss of the function of the circuit device. When low temperature polysilicon (LTPS, Low Temperature Poly-Silicon) technology is applied to the display panel, due to the introduction of TFT modules, digital signals have to work...

AI Technical Summary

Problems solved by technology

During the manufacturing process of the array substrate, before the ESD high voltage generated by the driving circuit area 7' is transmitted to the display area 6' along the gate line 3', the gate line 3' only passes through the polysilicon in the dummy pixel area 1'. Line 4' overlaps twice on different planes, (only about 100 nanometer thick gate insulating layer is separated between gate line 3' and polysilicon wiring 4', between gate line 3' and polysilicon wiring 4' The high voltage difference easily causes the gate insulating layer to be broken down), and the overlapping area is very limited, so the ESD high voltage that has not been released often continues to pass into the display area 6' and causes the pixels in the display area 6' to be damaged. Abnormal bright or dark spots caused by the 6' edge of the display area

[0005] In other words, the inventors of the present application found that when the overlapping area of ​​the polysilicon wiring 4' and the gate line 3' in the dummy pixel area 1' is equal to or smaller than that of the polysilicon wiring 4' and the gate line in the display area 6' When the line 3' overlaps the area, the static voltage cannot be effectively released

Therefore, when the electrostatic voltage is too large, the dummy pixel area cannot fully release it, causing the electrostatic voltage to continue to pass into the display area along the gate line, destroying the pixel function of the display area

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