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Wafer test system

A technology for wafer testing and testing values, applied in electronic circuit testing, electrical measurement, and measuring devices, etc., can solve problems such as inability to easily obtain wafer testing and testing information, and achieve the effect of improving data analysis efficiency

Inactive Publication Date: 2017-04-26
SINO IC TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to solve the problem that the traditional wafer test system cannot easily obtain the specific test information of the wafer test, the present invention provides a wafer test system

Method used

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Examples

Experimental program
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Effect test

Embodiment 1

[0027] The invention provides a wafer test system, such as figure 1 As shown, it includes a test unit 101, a control unit 102, a data storage unit 103 and a display and interaction unit 105; the test unit 101 is used to test the wafer and store test data in the data storage unit 103; The control unit 102 extracts the test data of the specified test wafer from the data storage unit 103 according to the instruction received by the display and interaction unit 105, and controls the display and interaction unit 105 to display the specified test wafer through a two-dimensional image according to the specified display mode. Test wafer specific test data.

[0028] The wafer testing system of this embodiment further includes a data processing unit 104 , the data processing unit 104 organizes the test data in the data storage unit 103 , and stores the sorted test data in the data storage unit 103 . Specifically, the sorted test data includes the following information: test item type, ...

Embodiment 2

[0033] The difference between this embodiment and the first embodiment lies in that the display modes of the display and interaction unit 105 are different.

[0034] Such as image 3 As shown, the display mode of this embodiment is to draw a two-dimensional image 301 corresponding to the test wafer on the screen, and the chip passing coordinates of the test wafer are in one-to-one correspondence with the chip image 302 in the two-dimensional image, and the chip test passes , the corresponding chip image 302 is displayed in green; if the chip test fails, the corresponding chip image 302 is displayed in red. In this display mode, no specific items need to be selected. As long as one test item fails, the control unit 102 judges that the chip has failed the test, and controls the display and interaction unit to display red on the chip image 302 . It can be understood that other different colors can be used to represent the pass and fail of the chip test. Of course, in order to i...

Embodiment 3

[0037] The difference between this embodiment and Embodiment 2 is that the display mode of the display and interaction unit 105 is that the control unit 102 superimposes two-dimensional images of a plurality of similar test wafers, and all chips with the same coordinates of the test wafers are If the test fails, the coordinate chip will display the specified color. This display mode can quickly analyze the common failure pattern of the wafer, so as to determine the failure cause of the test wafer. When the chip image is clicked by the mouse, the test information of all test items of a plurality of similar test wafers and the chip corresponding to the clicked chip image can also be displayed.

[0038] Using the wafer test system provided by the present invention, the control unit extracts the test data of the specified test wafer from the data storage unit according to the instructions received by the display and interaction unit, and controls the display and interaction unit t...

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PUM

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Abstract

The invention provides a wafer test system. The wafer test system comprises a test unit, a control unit, a data storage unit and a display and interaction unit, wherein the test unit is used for testing wafers and storing test data into the data storage unit, the control unit is used for extracting test data of a designated wafer from the data storage unit according to an instruction received by the display and interaction unit and controlling the display and interaction unit for displaying the specific test data of the designated test wafer through one-two-dimensional images according to a designated display mode. The wafer test system is advantaged in that a problem that the specific test information of a test wafer can not be conveniently acquired by a traditional wafer test system in the prior art is solved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a wafer testing system. Background technique [0002] The main purpose of wafer testing is to conduct electrical function tests on the chips in the wafer, screen out bad chips, and classify unqualified products according to the type of electrical defects, and provide them to the wafer manufacturing plant for data analysis and process improvement. [0003] At present, in the industrialization testing of integrated circuit wafers, one of the ways is to use colors to represent different failure types of corresponding chips, such as green for all pass, red for contact failure, yellow for function failure, etc., and finally reflected in the drawn On the two-dimensional image of the wafer; in another way, directly use green to indicate that the corresponding chip has passed the test, and red to indicate that the corresponding chip has failed the test, and finally reflect it...

Claims

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Application Information

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IPC IPC(8): G01R31/28
CPCG01R31/2831
Inventor 罗斌张志勇祁建华王锦凌俭波
Owner SINO IC TECH
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