Liquid crystal display and driving chip thereof

Abstract

The invention discloses a liquid crystal display and a driving chip thereof. The driving chip comprises a read-only memory, a random access memory and a timing comparison module, wherein a register value is stored in the read-only memory; the random access memory comprises a register set; when the liquid crystal display is powered on, the register value in the read-only memory is written into the register set and is used for controlling the working state of the liquid crystal display; the timing comparison module is used for reading the register value of the read-only memory and the register value of the register set on time and rewriting the register value of the read-only memory into the register set when the difference of the register value of the read-only memory and the register value of the register set is detected so as to guarantee the liquid crystal display maintaining the working state. According to the scheme, the liquid crystal display can effectively reduce the probability of abnormal display of the liquid crystal display caused by electrostatic problem and can enhance the antistatic capacity of the liquid crystal display.

Description

technical field [0001] The invention relates to the field of liquid crystal display technology, in particular to a liquid crystal display screen and a driving chip thereof. Background technique [0002] Screen display abnormalities and failures caused by static electricity are usually due to static electricity flipping the register status of the display screen, that is, the register bit with the original state of 1 is affected by static electricity and becomes 0, resulting in abnormal display or failure of the display screen. Recently, the anti-static error correction methods of LCD screens all require the electronic equipment platform to periodically read the status of the display screen. There are two main methods: [0003] One is to read the status of the registers, usually to read several registers in a targeted manner, generally no more than 3, because the process of reading registers will occupy the data bus, and the data bus is constantly transmitting display screen d...

AI Technical Summary

Problems solved by technology

[0005] In the prior art, whether reading registers or reading frame synchronization signals is used to detect screen abnormalities, there will be some specific abnormalities that cannot be recovered. For example, reading registers generally limits the number of no more than 3 registers, and when the display screen is working, the number of registers Possibly hundreds, which will make certain register exceptions may not detect exceptions

Similarly, reading the frame synchronization signal cannot cover all register exceptions

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