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Elliptic curve cipher chip device and system, and data cache control method

A technology of elliptic curve cryptography and control methods, which is applied in the field of elliptic curve cryptography chip devices, can solve the problem of fewer control schemes, and achieve the effect of improving data throughput

Inactive Publication Date: 2016-12-07
赛芯半导体技术(北京)有限公司
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] At present, in the process of data encryption, security chips based on elliptic curve cryptographic algorithms are rarely used, and there are even fewer schemes to control them. research is necessary

Method used

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  • Elliptic curve cipher chip device and system, and data cache control method
  • Elliptic curve cipher chip device and system, and data cache control method
  • Elliptic curve cipher chip device and system, and data cache control method

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specific Embodiment

[0073] In this embodiment, the read cache is defined as rd_buf, the PC write pointer is h_p, the elliptic curve cryptographic chip read pointer is h_ptr, the synch_bit_up register group is used for reading the synchronous bit register group, and the synch_bit_up register group uses a group of data lengths Divided as a unit, the synch_bit_up register group synchronization flag rd_buf:

[0074] Such as Figure 5-6 As shown, before the PC sends data each time, it first checks whether the flag bit of the synch_bit_up register group corresponding to the h_p pointer is empty. The marked position of the register bank is valid;

[0075] When the FPGA detects that the mark bit of the synch_bit_up register group corresponding to the h_ptr pointer is valid, the FPGA reads the data from the rd_buf to the internal unit of the elliptic curve encryption chip for processing, and then makes the mark position of the synch_bit_up register group corresponding to the h_ptr pointer empty .

[00...

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Abstract

The invention discloses an elliptic curve cipher chip device and system, and a data cache control method, and belongs to the field of information security, an encryption / decryption chip technology, a digital signature and signature verification. The device comprises an elliptic curve cipher chip, and an FPGA connected with the elliptic curve cipher chip. Registers in the FPGA comprise a read synch bit register group and a write synch bit register group. The FPGA comprises a first double-port SRAM for reading a cache and a second double-port SRAM for writing the cache. The read synch bit register group and the write synch bit register group synchronously mark the read cache and the write cache. The FPGA is also connected with a PCI interface which is used for being connected with a PC. Compared with the prior art, the device, the system and the method have the advantages that mass data transmission is realized, and a data throughput rate is improved.

Description

technical field [0001] The invention relates to the fields of information security, encryption and decryption chip technology, digital signature and signature verification, in particular to an elliptic curve cryptographic chip device, system and data cache control method. Background technique [0002] At present, there are three types of popular public key cryptographic algorithms: schemes based on the difficulty of large number decomposition, such as public key encryption algorithm (RSA), etc.; schemes based on difficult discrete logarithms on finite fields, such as ElGamal algorithm; Curve discrete logarithm difficult schemes, such as elliptic curve digital signatures, digital signatures are also the most typical application of public key cryptography. in: [0003] The advantages of elliptic curve cryptography are reflected in three aspects: First, under the condition of the same key length, its encryption security is higher than that of RSA and other algorithms, that is,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/30
CPCH04L9/3066H04L2209/125
Inventor 丁丹王志中王惠美邓先坤
Owner 赛芯半导体技术(北京)有限公司
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