Fabrication method of wafer-level uniaxial strain GE on Aln buried insulating layer based on silicon nitride stress film and scale effect

A scale effect, uniaxial strain technology, applied in the field of microelectronics, can solve problems such as poor compatibility, poor reliability, wafer fragmentation, etc., to avoid wafer fragmentation, low cost, and increase the amount of strain.

Active Publication Date: 2019-01-08
XIDIAN UNIV
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] However, this method has the following disadvantages: 1) Poor compatibility with traditional integrated circuit technology: In order to obtain GeOI with different strains, this method needs to make additional bending tables with different curvature radii, and the manufactured bending tables need to be compatible with existing With annealing equipment
2) Poor reliability: This process requires the use of pressure rods to apply mechanical force to bend the GeOI wafer, which will introduce defects into the top layer of Ge; if the GeOI wafer bends too much, it will cause wafer fragmentation
3) Due to the fear of breaking the GeOI wafer, the bending degree of the mechanical bending cannot be too large, which limits the amount of strain introduced in the top layer Ge, and the amount of strain that can be achieved is small

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Fabrication method of wafer-level uniaxial strain GE on Aln buried insulating layer based on silicon nitride stress film and scale effect
  • Fabrication method of wafer-level uniaxial strain GE on Aln buried insulating layer based on silicon nitride stress film and scale effect
  • Fabrication method of wafer-level uniaxial strain GE on Aln buried insulating layer based on silicon nitride stress film and scale effect

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0037] Example 1, preparing a 3-inch AlN buried insulating layer uniaxially strained GeOI wafer material.

[0038] Step 1: Clean the AlN buried insulating layer GeOI wafer to remove surface pollutants.

[0039] (1.1) Use acetone and isopropanol to alternately perform ultrasonic cleaning on the GeOI wafer to remove organic contamination on the substrate surface;

[0040] (1.2) Prepare a 1:1:3 mixed solution of ammonia, hydrogen peroxide, and deionized water, and heat it to 120°C. Place the GeOI wafer in the mixed solution for 12 minutes, take it out and rinse it with a large amount of deionized water. To remove inorganic pollutants on the surface of GeOI wafers;

[0041] (1.3) Soak the GeOI wafer in HF acid buffer for 2 minutes to remove the oxide layer on the surface.

[0042] Step 2: Ion implantation.

[0043] Ion implantation is carried out to the cleaned GeOI wafer, so that the interface 4 of the Si substrate 3 and the AlN buried insulating layer 2 is loose, such as fi...

Embodiment 2

[0056] Example 2, preparing a 5-inch AlN buried insulating layer uniaxially compressively strained GeOI wafer material.

[0057] Step 1: cleaning the AlN buried insulating layer GeOI wafer to remove surface pollutants.

[0058] The implementation of this step is the same as step 1 of Embodiment 1.

[0059] Step 2: Implant the cleaned GeOI wafer with a dose of 1.5E15cm -2 , He ions with an energy of 120Kev to loosen the interface 4 between the Si substrate 3 and the AlN buried insulating layer 2, such as figure 2 as shown in b.

[0060] Step 3: using the PECVD plasma enhanced chemical vapor deposition process, deposit a tensile stress SiN film 5 with a thickness of 0.9 μm and a stress of 1 GPa on the surface of the top Ge layer 1 of the ion-implanted GeOI wafer, such as figure 2 as shown in c.

[0061] The deposition process conditions are: high-frequency HF power is 1.1KW, low-frequency LF power is 0.29KW, high-purity SiH 4 The flow rate is 0.29slm, high-purity NH 3 Th...

Embodiment 3

[0070] Example 3, preparing an 8-inch AlN buried insulating layer uniaxially strained GeOI wafer material.

[0071] Step A: cleaning the AlN buried insulating layer GeOI wafer to remove surface pollutants.

[0072] The implementation of this step is the same as step 1 of Embodiment 1.

[0073] Step B: Ion implantation.

[0074] A dose of 1.5E16cm was applied to the cleaned GeOI wafer -2 , He ion implantation with an energy of 160Kev to loosen the interface 4 between the Si substrate 3 and the AlN buried insulating layer 2, such as figure 2 as shown in b.

[0075] Step C: Depositing a SiN film under high pressure stress.

[0076] PECVD plasma-enhanced chemical vapor deposition process is used to deposit a compressive stress SiN film 5 with a thickness of 1.3 μm and a stress of -1.2 GPa on the surface of the top Ge layer 1 of the GeOI wafer after ion implantation, such as figure 2 as shown in c.

[0077] The deposition process conditions are: high-frequency HF power is 0...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
widthaaaaaaaaaa
Login to view more

Abstract

The invention discloses a manufacturing method for the wafer-level uniaxial strain Ge on an AlN buried insulating layer based on a silicon nitride stress thin film and scale effect. The manufacturing method is implemented by the steps of 1, cleaning a GeOI wafer, and performing He ion implantation; 2, depositing a SiN thin film with the pressure stress of greater than minus 1GPa or an SiN thin film with the tensile stress of greater than 1GPa on the Ge layer on the top layer of the GeOI wafer after ion implantation, and etching the SiN thin film to form a strip-shaped array; 3, performing annealing processing on the GeOI wafer with the SiN thin film array; and 4, etching and removing the SiN thin film array from the surface of the GeOI wafer to obtain the wafer-level uniaxial strain GeOI material. According to the manufacturing method, due to the uniaxial stretching or uniaxial compression plastic deformation of the AlN buried insulating layer under the effect of the strip-shaped SiN thin film, strain is introduced to the Ge layer on the top layer, so that the wafer-level uniaxial strain Ge can be used for manufacturing the GeOI wafers required by the high-temperature, high-power-consumption and high-power integrated circuits.

Description

technical field [0001] The invention belongs to the field of microelectronics technology, and relates to a semiconductor substrate material manufacturing process technology, specifically a method for manufacturing a wafer-level uniaxially strained Ge material on an AlN buried insulating layer, which can be used for manufacturing high temperature, large power consumption, high GeOI wafers required for power integrated circuits. Background technique [0002] It is well known in the industry that the mobility of electrons and holes of the semiconductor Ge is 2.8 times and 4.2 times that of Si, respectively, and its hole mobility is the highest among all semiconductors. The strained Ge technology that introduces strain technology into Ge devices and integrated circuits can significantly improve carrier mobility, for example, the hole mobility of strained Ge buried trenches can be increased by 6-8 times. Therefore, Ge and strained Ge will be the best channel materials for Si-bas...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/762
CPCH01L21/7624H01L21/76264
Inventor 郝跃戴显英梁彬苗东铭祁林林焦帅
Owner XIDIAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap