D trigger resistant to single event upset

Abstract

The invention discloses a D trigger resistant to single event upset. The D trigger is formed by master and slave latches connected in series. The master latch and the slave latch have completely same structure. The core of a latch is no longer composed of two end-to-end inverters, but six PMOS transistors P1 to P6 and six NMOS transistors N1 to N6. The master latch or the slave latch of the invention can be formed by adding a clock-controlled transistor to the core of the latch. Compared with triplication redundancy in the prior art, the D trigger not only save the area of an election circuit, but also eliminate single event sensitivity due to the election circuit. Further, the D trigger is lower in single event sensitivity and better in single event upset resistance when storing a numerical value 0. Since many triggers are required to hold the same numerical value for a long time in practical application, the invention is significant to enhance the single event upset resistance of the kind of the triggers.

Description

technical field [0001] The invention relates to a flip-flop in the field of integrated circuits, in particular to a D flip-flop resistant to single-event reversal in a radiation environment. Background technique [0002] There are a large number of high-energy particles (protons, heavy ions, etc.) and high-energy rays in the universe. A sequential unit in an integrated circuit, such as a flip-flop, will generate a single event upset (Single Event Upset, referred to as SEU) after being bombarded by these high-energy particles and rays. The generation of single-event upsets will produce soft errors, which will make the operation of integrated circuits go wrong. As the process size continues to shrink, the transistor density of integrated circuits continues to increase, and the probability of multiple transistors being bombarded by single particles at the same time is greatly increased, and the reduction in the size of the transistor itself makes the critical charge that repre...

AI Technical Summary

Problems solved by technology

[0007] The technical problem to be solved by the present invention is: the existing reinforced D flip-flop cannot meet the requirement of anti-single event flip-flop in the radiation environment, and the traditional three-mode redundant reinforcement technology of D flip-flop cannot avoid the single event flip-flop caused by the election circuit In addition to the problem of large area overhead, a D flip-flop that resists single event flips is provided, which has stronger anti-single event flip-flop capability, and effectively reduces the area overhead of the triple-mode redundancy reinforcement technology, eliminating the single-event sensitivity caused by the election circuit. sexual problems

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