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Trench super junction epitaxial filling method

A filling method and super-junction technology, applied in semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve the problems of fast device switching speed and weak electromagnetic interference performance, so as to reduce switching speed and improve complete reaction time, reduce the effect of external electromagnetic interference

Active Publication Date: 2019-02-05
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
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Problems solved by technology

[0009] The disadvantage of the super junction formed by the existing trench-type super junction manufacturing method is that the switching speed of the device will have a faster value, thus making the electromagnetic interference performance (EMI) performance weaker

Method used

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Embodiment Construction

[0032] First of all, let me explain the EMI problem caused by the continuous improvement of the super junction process: the current mass production process has a diffusion resistance (RSP) close to 10mohm cm 2 . This brings about a substantial reduction in device area, which is a huge advantage in terms of manufacturing costs. However, due to the sharp reduction of device area, some other problems have also been brought about, and EMI problem is one of them. EMI is due to the fact that after the device is reduced, all parasitic capacitances are also reduced due to the reduction in area, resulting in a sharp increase in device switching speed, higher dV / dt, dI / dt is very easy to cause oscillations in the parasitic capacitance and inductance in the circuit, resulting in Excessive electromagnetic radiation, that is, EMI problem.

[0033] In the existing method, the EMI problem of the super junction device formed by trench filling is more prominent than that of the super junctio...

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Abstract

The invention discloses a groove type super junction epitaxial filling method. The groove type super junction epitaxial filling method comprises the following steps: a first step, providing a semiconductor substrate formed with an N type epitaxial layer; a second step, forming a plurality of grooves in the N type epitaxial layer; and a third step, filling a P type epitaxial layer with a hierarchical structure in the grooves by epitaxial growth, wherein the hierarchical structure is realized by adjusting the filling speed of a borane gas. By adopting the groove type super junction epitaxial filling method disclosed by the invention, the switching speed of a device formed by a super junction can be reduced, and external electromagnetic interference is reduced.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit manufacturing process method, in particular to a trench type super junction epitaxial filling method. Background technique [0002] The super junction is composed of alternately arranged P-type thin layers and N-type thin layers formed in a semiconductor substrate. The existing super junction manufacturing methods include the method of trench epitaxial filling and the use of multiple epitaxy plus ion implantation. method of formation. [0003] The super junction formed by multiple epitaxy plus ion implantation method has high cost and long process time. However, the method of trench epitaxial filling is relatively low in cost and high in production efficiency. In the existing technology, the method of trench epitaxial filling is mostly used to form super junctions. Since this method is to manufacture super junctions through trench technology, the The formed super junction is called a trench ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/06H01L21/20H01L23/552
Inventor 杨震徐丹王飞
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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