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A positioning method for packaging and picking up chips

A positioning method and chip technology, applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve problems such as picking up errors, and achieve the effect of avoiding picking up wrong chips and making the operation simple

Active Publication Date: 2018-02-27
唐山捷准芯测信息科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there is a big hidden danger in using the chip map to identify and pick up the chip, which is the problem of wrong picking. How to realize the one-to-one correspondence between the chip map file and the physical wafer without making mistakes has become the primary problem to be solved when picking up the chip from the chip map file and packaging it.

Method used

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  • A positioning method for packaging and picking up chips
  • A positioning method for packaging and picking up chips

Examples

Experimental program
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Embodiment Construction

[0014] see figure 1 and figure 2 , the positioning method of the package pick-up chip of the present invention includes the modification of two parts, figure 1 Arrangement for the exposure area of ​​the actual wafer and its integrated circuit, where 10 is the positioning notch (Notch) of the wafer, and areas 20, 30, and 40 are the least exposed areas of effective chips on the edge; figure 2 It is a part of the wafer map (Wafer Map) of the wafer test, and the positioning point 50 is the chip position of the wafer map corresponding to the physical positioning area.

[0015] see figure 1 and figure 2 , T2174 and other series of products based on the positioning method of the present invention have been mass-produced, and there are no errors in wafer manufacturing, wafer testing, and packaging and pick-up stages.

[0016] Adopt the positioning method of the integrated circuit production, testing and packaging of various embodiments of the present invention to pick up the ch...

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PUM

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Abstract

The invention discloses a positioning method for packaging and picking up chips. In this positioning method, in the production and design process of the integrated circuit, the triangular unexposed area on the edge of the wafer is selected as the positioning area; Do not etch, and select the positioning point for chip positioning; in the integrated circuit testing process, avoid the triangular unexposed area, and mark good or bad chips in the chip map file, and the chips that have not been tested are marked as invalid chips ;In the process of chip packaging and picking up integrated circuit chips, the chip map is used to pick up the chip, and the positioning marks in the chip map correspond to the special positioning graphics on the physical wafer, so as to realize the one-to-one correspondence between the chip map file and the physical wafer, In this way, the problem of picking up wrong chips during the packaging process can be avoided.

Description

technical field [0001] The invention relates to an integrated circuit manufacturing process and process, and the field of integrated circuit chip packaging, especially the field of integrated circuit packaging that adopts a positioning method to pick up chips. Background technique [0002] With the rapid development of integrated circuit technology, the chip size is getting smaller and smaller, and the number of chips produced by a single wafer is increasing. At the same time, due to the increase of chip functions and the increase of packaging pins, the packaging of integrated circuit chips is becoming more and more challenging, and the cost of packaging is increasing. Therefore, how to reduce the error rate in the packaging process becomes more and more difficult. As the process becomes more and more important, the step of picking up the chip die, which is the first step in chip packaging, becomes even more important. [0003] In the existing integrated circuit chip manufa...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/68H01L21/67H01L23/544
Inventor 肖金磊欧阳睿刘静解辰
Owner 唐山捷准芯测信息科技有限公司
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