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Three-dimensional memory and its manufacturing method

A manufacturing method and memory technology, which can be applied to electric solid-state devices, semiconductor devices, electrical components, etc., can solve the problems of storage and storage cell scaling bottlenecks, limited critical dimensions of planar NAND flash memory, etc., and achieve the effect of improving uniformity and reliability.

Active Publication Date: 2017-09-15
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, the current planar NAND flash memory is limited by the critical size of components in integrated circuits, and faces a bottleneck in the scaling of memory cells.

Method used

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  • Three-dimensional memory and its manufacturing method

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Embodiment Construction

[0050]Figure 1 to Figure 8 is a top view of the flow of a manufacturing method of a three-dimensional memory according to an embodiment of the present invention. Figure 1A to Figure 8A yes Figure 1 to Figure 8 Sectional view of the A-A tangent. Figure 1B to Figure 8B yes Figure 1 to Figure 8 Sectional view of the B-B tangent. Figure 1C to Figure 8C yes Figure 1 to Figure 8 Sectional view of the C-C tangent. Figure 1D to Figure 8D yes Figure 1 to Figure 8 Sectional view of the D-D tangent.

[0051] Please refer to Figure 1 to Figure 1D , forming a stacked structure 12 on the substrate 10 . The stack structure 12 includes a plurality of insulating layers 14 and a plurality of semiconductor layers 16 alternately. The material of the insulating layer 14 may be a dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride or a combination thereof. The thicknesses of the insulating layers 14 can be the same or different, and the thicknesses are, for...

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PUM

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Abstract

The invention discloses a three-dimensional memory and a manufacturing method thereof. The manufacturing method of the three-dimensional memory includes: patterning the laminated structure to form a comb structure; the comb structure includes bit line pads extending in a first direction and comb portions extending in a second direction; on the comb structure A charge storage layer is formed on the surface and side walls; word lines extending in the first direction and auxiliary gates extending in the first direction are formed on the charge storage layer; each word line covers the upper surface and the part of the comb portion of the first region The sidewall, and the auxiliary gate covers the upper surface and sidewall of the edge region of the bit line pad; remove the charge storage layer on the upper surface of the bit line pad, and pattern the stacked structure of the bit line pad to form ladder-like structure; ion implantation process is performed on the ladder-like structure to form a doped region in the semiconductor layer under each step of the ladder-like structure.

Description

technical field [0001] The present invention relates to a semiconductor element and its manufacturing method, and in particular to a three-dimensional memory and its manufacturing method. Background technique [0002] As consumer products have higher and higher requirements for storage subsystems, the standards for read / write speed and capacity of products are also getting higher and higher, so high-capacity related products have become the mainstream of the industry. In view of this, the development of memory (especially NAND flash memory) must also meet this demand. [0003] However, the current planar NAND flash memory is limited by the critical dimensions of components in integrated circuits, and faces a bottleneck in the scaling of memory cells. So designers are looking for multi-planar 3D NAND flash memory to achieve larger storage capacity and lower cost per bit. Contents of the invention [0004] The invention provides a three-dimensional memory and its manufactu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11582H01L27/11556H01L29/10H01L29/423H10B43/27H10B69/00H10B41/27
Inventor 李冠儒
Owner MACRONIX INT CO LTD
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