An automatic conversion system from hardware language vhdl to msvl

A hardware language, automatic conversion technology, used in memory systems, program control design, instruments, etc.

Active Publication Date: 2017-09-19
XIDIAN UNIV
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  • Abstract
  • Description
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Problems solved by technology

[0006] In addition, the modeling, simulation, and verification language MSVL and the hardware description language VHDL share many similarities in syntax, making conversion possible

Method used

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  • An automatic conversion system from hardware language vhdl to msvl
  • An automatic conversion system from hardware language vhdl to msvl

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Embodiment Construction

[0082] The present invention will be further described below with reference to the accompanying drawings.

[0083] like figure 1 , figure 2 As shown, the present invention is an automatic conversion system from VHDL to MSVL, and the automatic conversion system includes:

[0084] File analysis module: equipped with a file analyzer, the file analyzer analyzes the top-level file parameter string of the VHDL program file, analyzes the file parameter string, obtains all files that need to be translated, and analyzes the dependencies between the files , so that the order of translation is determined according to the dependencies, and a list of VHDL source files to be translated is generated, and the files in the list are passed to the lexical analysis module in order;

[0085] Lexical analysis module: equipped with a lexical analyzer, the lexical analyzer uses regular expressions to analyze the VHDL source program, and identifies the morphemes in the source program, such as keywo...

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Abstract

An automatic conversion system from hardware language VHDL to MSVL, which can convert VHDL language program files into MSVL language program files, and the conversion system includes a file analysis module, a lexical analysis module, a syntax analysis module, an information storage module, and a translation module , Translation result string connection module. After VHDL program is converted into MSVL program, the same language is used for model construction and property description, so that the verification can be carried out under the same logic framework, and the indirect model checking of VHDL language program can be realized conveniently. In the conversion process, the VHDL program is converted into a semantically equivalent MSVL program by formulating conversion rules of different grammatical structures and some additional auxiliary means, so that the equivalent MSVL program can be simulated, modeled and Verification, to ensure the correctness of the source VHDL program.

Description

technical field [0001] The invention relates to lexical analysis and syntax analysis in the technical field of hardware description language VHDL language and the technical field of compilation principle, in particular to an automatic conversion system from VHDL to MSVL, which is used for converting a hardware circuit program described by VHDL to semantically equivalent MSVL code . Background technique [0002] The full name of VHDL is Very-High-Speed ​​Integrated Circuit Hardware DescriptionLanguage, which was born in 1982. At the end of 1987, VHDL was recognized as a standard hardware description language by the IEEE and the US Department of Defense. Since IEEE-1076 (referred to as version 87), various EDA companies have successively launched their own VHDL design environments, or announced that their design tools can interface with VHDL. In 1993, IEEE revised VHDL to expand the content of VHDL from a higher level of abstraction and system description capabilities, and a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/45
Inventor 段振华张康田聪王小兵张南黄伯虎
Owner XIDIAN UNIV
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