Anti-breakdown soi folded gate insulated tunneling bipolar transistor and manufacturing method thereof

Abstract

The invention relates to an anti-breakdown SOI folded gate insulated tunneling bipolar transistor. Compared with MOSFETs or tunneling field effect transistors of the same size, the breakdown protection region with low impurity concentration is introduced into the collector junction and the emitter junction to significantly improve the The forward and reverse anti-breakdown ability of the device at the deep nanometer scale; there are insulating tunneling structures on both sides and the upper surface of the base region, and the insulating tunneling effect occurs simultaneously on both sides of the base region and on the upper surface under the control of the gate electrode. The upper surface, thus increasing the generation rate of tunneling current; using the extremely sensitive relationship between the resistance of the tunneling insulating layer and its internal field strength to achieve excellent switching characteristics; enhancing the tunneling signal through the emitter to achieve excellent forward conduction characteristics; in addition, the present invention also proposes a specific manufacturing method of an anti-breakdown SOI folded gate insulated tunneling bipolar transistor unit and its array. The transistor significantly improves the working characteristics of the nanoscale integrated circuit unit and is suitable for popularization and application.

Description

Technical field: [0001] The invention relates to the field of ultra-large-scale integrated circuit manufacturing, and relates to a structure of an anti-breakdown SOI folded-gate insulated tunneling bipolar transistor suitable for the manufacture of high-performance ultra-high-integrated integrated circuits. The specific manufacturing method of the pole transistor array. Background technique: [0002] At present, with the continuous improvement of the integration level, the source electrode and the channel or between the drain electrode and the channel of the integrated circuit unit Metal Oxide Semiconductor Field Effect Transistor (MOSFETs) devices form a steep mutation PN within a few nanometers. Junction, when the drain-source voltage is large, this steep abrupt PN junction will have a breakdown effect, which will cause the device to fail. As the size of the device continues to shrink, this breakdown effect becomes more and more obvious. In addition, the continuous shorte...

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Problems solved by technology

In addition, the continuous shortening of the channel length has led to an increase in the subthreshold swing of MOSFETs, which has resulted in severe degradation of switching characteristics and a significant increase in static power consumption.

Although the degradation of device performance can be alleviated by improving the gate electrode structure, when the device size is further reduced to below 20 nanometers, even with the optimized gate electrode structure, the subthreshold swing of the device will also decrease. increases with further reductions in the device channel length, resulting in further deterioration of the device performance

[0003] Tunneling Field Effect Transistors (TFETs), compared with MOSFETs, although its average subthreshold swing has been improved, but its forward conduction current is too small. Narrow materials are used to generate the tunneling part of the tunneling field effect transistor, which can increase the tunneling probability to improve the transfer characteristics, but increases the difficulty of the process

In addition, the use of high dielectric constant insulating material as the insulating dielectric layer between the gate and the substrate can improve the control ability of the gate to the electric field distribution of the channel, but it cannot substantially increase the tunneling probability of the silicon material, so For the transfer characteristics of tunneling field effect transistors, the improvement is very limited

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