An assertion-based embedded memory controller verification system and method

Abstract

The invention discloses an assertion-based embedded storage controller verification system and method, and relates to the field of integrated circuit logic verification. The verification system mainly includes: (1) DUV code analysis and extraction unit (2) verification assertion and excitation generation unit (3 ) integrated verification unit; through automatic analysis and extraction of DUV design codes, combined with the memory controller verification assertion library and stimulus generation library, the verification assertion code and stimulus generation code can be efficiently generated, and the verification code can be applied to simulation verification and formal verification at the same time Two verification methods, and can realize the automatic loading verification of DUV design in the comprehensive verification unit, which greatly shortens the time of verification and debugging, and improves the verification efficiency. Compared with the traditional logic simulation verification alone, it has many advantages in terms of verification efficiency and coverage.

Description

technical field [0001] The invention relates to the field of integrated circuit logic verification, in particular to an assertion-based embedded memory controller verification system and method. Background technique [0002] With the continuous increase of integrated circuit design scale, the type and capacity of embedded memory are also increasing, and the verification of memory controller has become an important part of chip design. In particular, the functional verification of memory controllers with complex control protocols and large storage capacity has become the focus of some design verification work. To achieve high-coverage verification requires a lot of manpower and time. There are two problems in the functional verification of this type of logic relying solely on logic simulation: one is that the increase in the design scale leads to a huge amount of simulation test stimulus data, and the time and labor costs of logic simulation also increase exponentially; Veri...

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Problems solved by technology

In particular, the functional verification of storage controllers with complex control protocols and large storage capacity has become the focus of some design verification work. To achieve high coverage verification, a lot of manpower and time are required

There are two problems in the functional verification of this type of logic relying solely on logic simulation: one is that the increase in design scale leads to a huge amount of simulation test stimulus data, and the time and labor costs of logic simulation also increase exponentially; Verification completeness is difficult to get an accurate judgment

However, in the traditional embedded storage controller verification method, it is necessary to manually design the verification assertion code for each storage controller in the DUV design, and write the verification stimulus file. increase

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