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High-speed comparator direct-current offset digital auxiliary self-calibration system and control method

A high-speed comparator and DC offset technology, applied in the direction of analog/digital conversion calibration/testing, can solve problems such as insufficient bandwidth and weak driving ability

Active Publication Date: 2015-01-14
TSINGHUA UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The purpose of the present invention is to solve the problem that the amplifier has insufficient bandwidth and poor driving ability under low power supply voltage

Method used

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  • High-speed comparator direct-current offset digital auxiliary self-calibration system and control method

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Embodiment

[0041] A high-speed comparator DC offset digitally assisted self-calibration system, such as figure 1 As shown, and the control method, it is composed of a configurable comparator module 100, a self-calibration module 200 and a timing signal generation circuit. The negative digital output D of the configurable comparator module 100 ON The output signal EN after passing through the AND gate A1 is used as the input signal of the self-calibration module 200, and the present invention uses S P [X:0], S N The [X:0] symbol represents a digital signal, where "X" represents the number of signal bits, "0" is 0, and S P [X:0], S N [X:0] means S P , S N The Xth bits of are all 0. The 4-bit output data S generated by the self-calibration module 200 P [3:0], S N [3:0] controls the compensating module in the configurable comparator module 100 , and then calibrates the DC offset voltage of the comparator until it is within the adjustable precision range.

[0042] The configurable co...

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Abstract

The invention discloses a high-speed comparator direct-current offset digital auxiliary self-calibration system and a control method. The system is formed by a configurable comparator comprising a compensation current source array, a self-calibration digital algorithm module and a time sequence signal generating circuit. The self-calibration digital algorithm module can generate two sets of digital signals in a symbolic coding mode according to output digits of the configurable comparator to control the opening and closing state of the compensation current source array, and thus the direct current offset voltage of the comparator can be calibrated to be within the adjustable precision range. The pre-amplifier stage bandwidth in the comparator can be configured so that power consumption under different sampling rates can be optimized.

Description

technical field [0001] The invention relates to the field of calibration of analog-digital converters, in particular to a high-speed comparator DC offset digital-assisted self-calibration device and control method. Background technique [0002] As the core module of the analog-to-digital converter, the comparator, such as Flash type, successive approximation type, pipeline type, over-sampling type, etc., its performance indicators, such as speed and accuracy, directly affect the signal-to-noise ratio of the analog-to-digital converter. Spurious dynamic range, non-linear error and other characteristics. In ultra-high-speed analog-to-digital converters, the design of high-speed and high-precision comparators is also a difficult point in the entire design, and the power consumption of analog-to-digital converters must also be considered. [0003] A simple comparator can be implemented using a high-gain switching op amp, but due to the bandwidth limitation of the op amp, its ga...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/10
Inventor 池保勇续阳王志华
Owner TSINGHUA UNIV
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