Interface circuit of CLF chip in SWP protocol
An interface circuit and chip technology, applied in the field of interface circuits, can solve the problems of increasing circuit design complexity and power consumption, and achieve the effect of low power consumption and simple circuit structure
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[0021] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.
[0022] The problem solved by the invention is to design a CLF chip interface circuit in the SWP protocol, which can correctly send the voltage signal S1 of the UICC chip in the SWP protocol, and can also correctly receive the current signal S2 of the UICC chip, thereby realizing full-duplex communication.
[0023] In order to solve the above-mentioned technical problems, the CLF chip interface circuit in the SWP protocol of the present invention, such as Figure 4 As shown, it includes: the input shaping module 1 is connected to the output end of the CLF chip, and is composed of an inverte...
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