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Method for selecting error correction circuit in memory

An error correction circuit and memory technology, applied in static memory, instruments, etc., can solve the problems of increasing ECC logic circuit area soft errors, wasting power consumption, etc., achieve logic reduction, avoid power consumption waste, and reduce soft errors The effect of chance

Active Publication Date: 2014-09-10
SHANGHAI XINCHU INTEGRATED CIRCUIT
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Problems solved by technology

Therefore, most of the data content in the network peak period is unimportant data content, and only a small amount of data content is important, that is, the ECC circuit with strong performance is protecting unimportant data content most of the time , which not only wastes power consumption, but also increases the area of ​​the ECC logic circuit and the probability of its own soft error caused by the large ECC area

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  • Method for selecting error correction circuit in memory
  • Method for selecting error correction circuit in memory
  • Method for selecting error correction circuit in memory

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Embodiment Construction

[0029] The invention proposes a method for selecting an error correction circuit in a memory, mainly by dividing the data content in the memory into several parts, and using different error correction circuits for different parts to correct errors, so as to optimize the power consumption of the memory and appropriately reduce The size of the effective error correction circuitry in memory.

[0030] The method of the present invention mainly includes: step S1: providing a memory containing a plurality of error correction circuits with different performances; step S2: dividing the stored content in the memory into several grades according to the importance; All error correction circuits and levels are paired in such a way that higher error correction circuits protect more important content.

[0031] A method for selecting an error correction circuit in a memory proposed by the present invention will be described in detail below in conjunction with the accompanying drawings and sp...

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Abstract

The invention provides a method for selecting an error correction circuit in a memory. ECC circuits with different performances are used for correcting data contents with different importance in the memory, so that the ECC circuits with the relatively high performances are used for correcting the data contents with the relatively high importance, and the ECC circuits with the relatively low performances are used for correcting the data contents with the relatively low importance, so as to avoid the power consumption waste caused by application of the same ECC circuits with the strong performances, and meanwhile, the logics of the ECC circuits, truly used at the any moment, are effectively reduced to reduce the soft error probability of the ECC circuit.

Description

technical field [0001] The invention relates to the field of semiconductor devices, in particular to a method for selecting an error correction circuit in a memory. Background technique [0002] Because there are many high-energy particles in the environment, and these high-energy particles will cause some soft errors in the circuit, which will have a certain degree of image on the performance of the circuit, especially the performance of the memory. For electronic products such as personal computers, it can be restarted or There are other ways to deal with this kind of soft error, but at the server level, if there is a problem, it will cause a lot of damage. For example, a network processor includes a variety of memories, common ones include Static Random Access Memory (SRAM for short), Dynamic Random Access Memory (DRAM for short), and three-state content addressable registers ( Ternary Content Addressable Memory, referred to as: TCAM) and on-chip cache (Cache), when erro...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/42
Inventor 景蔚亮陈邦明
Owner SHANGHAI XINCHU INTEGRATED CIRCUIT
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