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Method for manufacturing high-k metal-gate (HKMG) device

A technology of high dielectric layer and manufacturing method, which is applied in the direction of semiconductor/solid-state device manufacturing, electrical components, semiconductor devices, etc., can solve the problem of high difficulty in process realization, and achieve the effect of reducing uncontrollability and process difficulty

Active Publication Date: 2014-05-07
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology

[0005] In view of the problems in the prior art, the present invention provides a method for manufacturing a metal gate device with a high dielectric layer, so as to solve the problem of high difficulty in realizing the existing process

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  • Method for manufacturing high-k metal-gate (HKMG) device
  • Method for manufacturing high-k metal-gate (HKMG) device
  • Method for manufacturing high-k metal-gate (HKMG) device

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Embodiment Construction

[0024] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.

[0025] Such as figure 1 As shown, the present invention provides a method for manufacturing a high dielectric layer metal gate device, comprising:

[0026] forming a gate structure including a dielectric layer, dummy polysilicon and sidewall oxide layers on the substrate;

[0027] depositing an interlayer insulating layer on the substrate, and performing chemical mechanical polishing to expose the pseudo-polysilicon;

[0028] Etching and removing the dummy polysilicon and the dielectric layer to form a groove whose bottom exposes the substrate corresponding to the dummy polysilicon;

[0029] performing fluorine ion implantation to dope the exposed substrate;

[0030] forming a pad oxide layer at the bottom of the...

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Abstract

The invention discloses a method for manufacturing a high-k metal-gate (HKMG) device. Fluorine ion implantation is executed after pseudo-polycrystalline silicon and a dielectric layer are removed. First-time annealing is performed after liner oxide is formed. Second-time annealing is performed after a high dielectric layer is formed. Fluorine ions are diffused from a channel region of a substrate to the liner oxide and the high dielectric layer and are combined with unstable hydrogen bonds to form a silicofluoride group. Therefore, technology uncontrollability and technology difficulty are decreased in a process that the fluorine ions are diffused from the pseudo-polycrystalline silicon to the high dielectric layer.

Description

technical field [0001] The invention relates to the field of semiconductor device manufacturing, in particular to a method for manufacturing a high dielectric layer metal gate (HKMG) device. Background technique [0002] With the development of semiconductor integrated circuits, existing semiconductor devices, such as polysilicon gates commonly used in complementary metal oxide semiconductor (CMOS) devices, have gradually revealed the following problems: the effective thickness of the gate insulating layer increases due to gate loss, The dopant easily penetrates into the substrate through the polysilicon gate to cause a change in the threshold voltage, and it is difficult to achieve a low resistance value on a small width. In order to solve the above problems, semiconductor technology has developed a semiconductor device that replaces the existing polysilicon gate with a metal gate, and uses a high dielectric constant (high k) material as a semiconductor device for the gate ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8238H01L21/28
CPCH01L21/2822H01L21/823857
Inventor 谢欣云
Owner SEMICON MFG INT (SHANGHAI) CORP
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