3-D single floating gate non-volatile memory device

Abstract

A 3-D Single Floating Gate Non-Volatile Memory (SFGNVM) device based on the 3-D fin Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) is disclosed. The disclosed Non-Volatile Memory (NVM) device consists of a pair of semiconductor fins and one floating metal gate. The floating metal gate for storing electrical charges to alter the threshold voltage of the fin MOSFET crosses over the pair of semiconductor fins on top of coupling and tunneling dielectrics above the surfaces of the two semiconductor fins. One semiconductor fin with the same type impurity forms the control gate of the non-volatile memory device. The other semiconductor fin is doped with opposite type of impurity in the channel regions under the metal floating gate and with the same type of impurity in the source and drain regions on the sides of the crossed metal floating gate.

Description

technical field [0001] The present invention relates to a three-dimensional (3-Dimension, 3-D) semiconductor non-volatile memory (non-volatile memory, NVM) unit device (cell device). The semiconductor non-volatile memory unit device of the present invention can be applied to the manufacture of standard complementary metal-oxide-semiconductor field effect transistors (complementary metal-oxide-semiconductor field effect transistors, CMOSFETs) of process technology generation (process technology node) below 20 nanometers The advanced fin field effect transistor (fin-shape field effect transistor, finFET) process technology is used for fabrication. In particular, the three-dimensional single floating gate non-volatile memory (single floating gate NVM, SFGNVM) device of the present invention is composed of a metal floating gate for storing charges (charge) and two MOSFET main body (body) and The control gate (control gate) is composed of semiconductor fins (fin). Background tec...

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Problems solved by technology

[0005] On the other hand, in terms of shrinking semiconductor NVM devices smaller than the 20nm process technology generation, due to the limitations of lithographic and etching processes, such as double-gate alignment and stacked double-gate processes The ultra-high (ultra-high) anisotropic (an-isotropic) etch aspect ratio (aspect ratio), the traditional semiconductor NVM device is also encountering the obstacle of the floating gate NVM device

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