Multi-serial-port parallel processing framework based on FPGA

Abstract

The invention belongs to the technical field of distributed industrial control, and relates to a multi-serial-port parallel processing framework based on an FPGA. The framework comprises transceivers, an FPGA programmable logic chip and a processor CPU. The CPU is connected with the FPGA chip via a CPU interface bus. The framework is characterized in that: multiple UART cores and multiple co-processor MCUs which are corresponding to all the UART cores are designed in the FPGA chip via a hardware description language; multiple embedded type storage devices which are corresponding to all the co-processor MCUs are embedded in the FPGA, and each embedded type storage device is configured to be a dual-port mode capable of performing read-write operation; and the multiple UART cores are connected with the multiple corresponding transceivers via RS232 / RS422 / RS485 interfaces. The framework is low in hardware design cost so that a CPU load can be effectively reduced, serial bus data transmission bandwidth can be enhanced and multipath serial channels can be flexibly expanded.

Description

technical field [0001] The invention belongs to the technical field of distributed industrial control, and in particular relates to an FPGA-based multi-serial port parallel processing architecture. Background technique [0002] UART (Universal Asynchronous Receiver Transmitter) is a serial transmission interface widely used in short-distance, low-speed communication. It is easy to operate, reliable in operation, strong in anti-interference, low in cost, and long in transmission distance (comprising 485 networks can transmit 1,200 meters above). In data communications, computer networks, and distributed industrial control systems, processors often use serial communications to exchange data and information with peripheral modules. [0003] In modern industrial control systems, multi-serial communication is used more and more widely. Especially in the field of data acquisition, the demand for the number of serial ports in engineering applications increases, and the processor ...

AI Technical Summary

Problems solved by technology

Such as 8250, 16550AFN and other chips are common special-purpose UART devices, hardware serial interface resources are limited, but the internal structure design of this type of chip is quite complicated, the chip has many pins, and some contain many auxiliary modules (such as FIFO). Only the basic functions of UART are often used in use, and such chips are used in design, resulting in waste of resources; 2) The number of scalable serial ports provided by processors or dedicated multi-serial port chips is limited, and more UART serial port expansion cannot be realized; 3. ) The peripheral interface circuit is complex, and the board design is more difficult; 4) The use of UART chips will also increase the hardware cost and increase the area of ​​the circuit board, which cannot be applied to multi-channel data acquisition occasions on a large scale; 5) The processor adopts serial mode Scan each channel in turn, but the serial port communication rate is too low, resulting in too long CPU waiting time, it is difficult to meet the actual needs of high real-time requirements and parallel processing

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