Multiphase high-resolution phase locked loop

Abstract

The invention discloses a high-resolution phase locked loop. The high-resolution loop phase locked loop comprises an input frequency divider, a phase detector connected with a reference frequency divider, a low pass filter connected with the phase detector, a voltage-controlled oscillator connected with the low pass filter, a multiphase loop frequency divider connected with the voltage-controlled oscillator and a phase frequency detector, and an output frequency divider connected with the voltage-controlled oscillator. The high-resolution phase locked loop provides high-resolution and low-noise clock signals, and the multiphase loop frequency divider provides high-resolution feedback signals for the phase frequency detector. The high-resolution phase locked loop improves the resolution of output signals of a phase locked loop in conditions of reducing loop analysis difficulty and reducing resource consumption.

Description

technical field [0001] The invention relates to frequency recovery and synthesis technology, in particular to a multi-phase high-resolution phase-locked loop. Background technique [0002] Phase-locked loops are widely used in modern electronic technology. The phase-locked loop is used in the microprocessor to provide a high-quality system clock for the system. In the field of wireless communication, phase-locked loop technology is used for up-down conversion, modulation and demodulation, etc. [0003] The basic structure of the phase-locked loop consists of a frequency-phase detector (FPD), a low-pass filter (LPF), and a voltage-controlled oscillator (VCO). The phase detector generates a voltage that is linearly proportional to the phase difference; the low-pass filter is used to suppress the high-frequency component of the output voltage of the phase detector; the voltage-controlled oscillator oscillates and outputs the corresponding frequency signal under the control of...

AI Technical Summary

Problems solved by technology

The advantage of Delta_sigma phase-locked loop is high output resolution and low noise; the disadvantage is that the loop design and analysis are too complicated, and the Delta_sigma modulator still has stability problems, and the design workload is heavy;

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