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Method and apparatus for improving processing performance of a multi-core processor

A multi-processor and processor technology, applied in multi-programming devices, electrical digital data processing, instruments, etc.

Active Publication Date: 2014-02-12
GM GLOBAL TECH OPERATIONS LLC +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, tasks executing simultaneously on different cores may need to be synchronized and / or coordinated with each other due to application level requirements

Method used

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  • Method and apparatus for improving processing performance of a multi-core processor
  • Method and apparatus for improving processing performance of a multi-core processor
  • Method and apparatus for improving processing performance of a multi-core processor

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Embodiment Construction

[0049] Referring now to the drawings, which are shown for purposes of illustrating certain exemplary embodiments only and not for purposes of limiting these embodiments, FIGS. 1-1 and 1-2 schematically illustrate the In an embodiment, the multi-core processing system includes first and second processing cores. The description herein of a multi-core processing system including first and second processing cores is illustrative and not limiting. Also, the terms "first" and "second" are used to identify and distinguish specific processing cores, not to indicate a sequence or priority. The multi-core processing system is preferably a homogeneous multi-core processor, but the present disclosure is not limited thereto. The concepts described here apply to any multi-core processing system employing two or more processing cores.

[0050] Picture 1-1 A first embodiment of a homogeneous multi-core processor 10 is shown, which is preferably a single-chip component comprising first and...

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Abstract

A method for managing task execution in a multi-core processor includes employing a spinlock to effect a dynamically enforceable mutual exclusion constraint and employing a multi-processor priority ceiling protocol to effect the dynamically enforceable mutual exclusion constraint to synchronize a plurality of tasks executing in the first and second processing cores of the multi-core processor.

Description

technical field [0001] This disclosure relates to multi-core processors. Background technique [0002] The statements in this section merely provide background information related to the present disclosure. Accordingly, these statements are not intended to constitute an admission of prior art. [0003] A processor is an electronic device configured with a central processing unit (CPU) that executes routines to perform tasks, and associated memory and storage devices. Processor performance can be improved by increasing the CPU's clock speed, and thus resulting in faster routine execution. Due to mechanical, electrical, and thermal limitations of processor hardware and interface devices, there are upper bounds on clock speed and associated processor performance. [0004] Multi-core processors have been introduced to improve performance in executing routines to perform tasks. In this architecture, the presence of multiple processing cores enables true parallel task executio...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/16G06F9/46
CPCG06F9/526G06F9/4881
Inventor P.朱斯托K.拉克什马南R.拉库马
Owner GM GLOBAL TECH OPERATIONS LLC
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