An adaptive matrix multiplication optimization method based on Godson 3b

Abstract

The invention discloses an adaptive matrix multiplication optimization method based on Loongson 3B. First, the multiplication matrix and the multiplied matrix of Loongson 3B are divided into two sub-matrices according to the principle that the size of the block is not larger than the second-level cache. The direct cache memory accessor prefetches the multiplication matrix whose column length is M and whose width is K to the high-speed buffer, and at the same time copies the multiplied matrix whose column length is K and whose width is N to the secondary high-speed buffer, and uses direct register access The device prefetches the multiplication matrix with column length l and width h and the multiplied matrix with length h and width g from the secondary high-speed buffer to the register, uses the multiply-add instruction to complete the multiply-add operation, and collects the module through the memory access state Obtain information and make adaptive adjustments to the block parameters M, K, N, l, h, and g to obtain new block parameters, thereby realizing efficient adaptive optimization of matrix multiplication operations on the Loongson 3B platform.

Description

technical field [0001] The invention belongs to the technical field of electrical digital data processing, and in particular relates to a method for optimizing a linear system software package based on Loongson 3B. Background technique [0002] Loongson 3B is China's first eight-core central processing unit (CPU) with completely independent intellectual property rights. In the field of high-performance computing, Godson 3B needs the support of the basic linear algebra subroutine library. According to the officially released Loongson 3B processing user manual, the existing Loongson 3B processor adds a cache lock window, direct register accessor (DRA), and direct cache memory on the basis of the Loongson 3A processor. Receiver (DCA) and other functions. Each central processing unit (CPU) core adopts a 4-transmission superscalar structure, including two 256-bit vector components, a 128x256-bit floating-point register file, which can store 512 double-precision floating-point n...

AI Technical Summary

Problems solved by technology

At present, the existing matrix multiplication optimization method based on the Loongson 3B hardware system generally suffers from troublesome programming and difficult debugging.

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