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Multidimensional Histogram Statistical Circuit and Image Processing System

A histogram statistics and histogram technology, applied in the field of image processing, can solve the problems of occupying CPU resources, time-consuming statistical process, poor real-time performance, etc., to achieve the effects of improving real-time performance, avoiding time overhead, and reducing computer power consumption

Active Publication Date: 2016-03-02
思创智汇(广州)科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] In view of this, the purpose of the embodiments of the present invention is to provide a multi-dimensional histogram statistical circuit and an image processing system having the multi-dimensional histogram statistical circuit, so as to overcome the large amount of computer-based statistics of the multi-dimensional histogram in the prior art. CPU resources, resulting in the problem of time-consuming statistical process and poor real-time performance

Method used

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  • Multidimensional Histogram Statistical Circuit and Image Processing System
  • Multidimensional Histogram Statistical Circuit and Image Processing System
  • Multidimensional Histogram Statistical Circuit and Image Processing System

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Embodiment 1

[0037] Please see attached figure 1 , is a schematic structural diagram of a multi-dimensional histogram statistical circuit disclosed in the first embodiment of the present invention, mainly including: a dimensionality reduction sub-circuit 11, a one-dimensional histogram statistical sub-circuit 12 and an external interface circuit (not marked in the figure).

[0038] The dimensionality reduction sub-circuit 11 is mainly used to receive multiple digital sequences corresponding to the multi-dimensional histogram and multi-dimensional vector sample sets, and obtain a joint digital sequence after combining the multiple digital sequences.

[0039] The one-dimensional histogram statistical sub-circuit 12 receives and counts the one-dimensional histogram corresponding to the current joint digital sequence, and determines the data of the multi-dimensional histogram according to the preset data mapping relationship between the one-dimensional histogram and the multi-dimensional histog...

example 1

[0047] When the input is a one-dimensional sequence of N digits with a bit width of Mi, such as figure 1 shown, including the sequence of digits 1S 1 [M 1 -1..0], number sequence 2S 2 [M 2 -1..0] to the numeric sequence NS N [M N -1..0].

[0048] The dimensionality reduction sub-circuit 11 receives N one-dimensional digital sequences S whose bit width is Mi corresponding to the N-dimensional vector sample set in parallel i [M i -1..0], obtaining the combined digital sequence S[M-1..0] with a bit width of M after merging the N digital sequences as the current combined digital sequence.

[0049] Among them, M and Mi are natural numbers whose bit width is greater than 1; the value range of i is 1~N, N is a natural number greater than 1, and the ".." in the digital sequence is used to represent the bit of parallel digital signal bits, for example, the sequence of digits S 1 [M 1 -1..0] represents the Mth of the digital signal S1 1 From -1 bit to the 0th bit, the digital...

Embodiment 2

[0071] Based on the multi-dimensional histogram statistical circuit disclosed in the first embodiment of the present invention, when the joint histograms of two adjacent images are counted, as image 3 As shown, the multi-dimensional histogram statistical circuit mainly includes: a frame FIFO memory 13, a dimensionality reduction sub-circuit 11, a one-dimensional histogram statistical sub-circuit 12 and an external interface sub-circuit (not shown in the figure).

[0072] The frame FIFO memory 13 is used to buffer the image pixel grayscale digital sequence collected in the last frame cycle, and as a delay digital sequence S delayed by one cycle 1 [k-1..0] output.

[0073] The dimensionality reduction sub-circuit 11 is used to receive the current image pixel grayscale digital sequence S 2 [k-1..0] and the delayed number sequence S 1 [k-1..0] are combined to obtain the sequence S[2k-1..0] as the current joint digital sequence output.

[0074] The one-dimensional histogram sta...

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Abstract

The invention discloses a multi-dimensional histogram statistic circuit and an image processing system with the circuit. The multi-dimensional histogram statistic circuit comprises a dimensionality reduction sub-circuit and a one-dimensional histogram statistic sub-circuit. Received multiple digital sequences corresponding to a multi-dimensional vector sample set of a multi-dimensional histogram are combined through the dimensionality reduction sub-circuit for obtaining a combined digital sequence, data of the multi-dimensional histogram are determined based on the one-one mapping relation between the data of a one-dimensional histogram in the combined digital sequence and the data, needing statistics, of the multi-dimensional histogram, and therefore the statistics of the multi-dimensional histogram is achieved. According to the way, the statistics of the multi-dimensional histogram is achieved, computer resources do not need to be consumed, and the purpose of lowering the power dissipation of a computer is achieved. Meanwhile, overhead time of accessing a memory frequently in the statistical process in the prior art can be saved, and the purpose of improving the instantaneity of the statistics of the multi-dimensional vector is achieved on the basis of lowering the power dissipation of the computer.

Description

technical field [0001] The present invention relates to the technical field of image processing, and more specifically relates to a multi-dimensional histogram statistical circuit and an image processing system with the multi-dimensional histogram statistical circuit. Background technique [0002] In the process of image matching calculations in the field of image processing, image comparison algorithms based on color-based 2-dimensional and 3-dimensional color histograms, and a kernel distance algorithm for comparing two sets of multi-dimensional feature sample sets are usually used. [0003] Among them, passive auto-focus technology is used in the process of multi-dimensional histogram statistics. The passive autofocus technology usually first detects a value that can describe the clarity of the image, that is, sharpness, and then uses the search algorithm to adjust the position of the lens in the lens to a clearer position, and then detects the current description of the ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T7/00
Inventor 黄晓峰
Owner 思创智汇(广州)科技有限公司
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