A half-rate clock-data recovery circuit based on phase-selective interpolation

Abstract

The invention discloses a half-rate clock data recovery circuit based on phase selection interpolation. The purpose is to solve the problem that the phase selection interpolation circuit for generating a pair of adjustable quadrature clock signals in the existing structure is too complicated, and proposes a A combination method of a novel phase-selective interpolation circuit. The half-rate clock data recovery circuit based on the phase selection / interpolation type includes a half-rate Bang-Bang type phase detector, a phase selector, a phase interpolator, a digital filter, a digital controller and an outer ring reference clock, and the phase selection Compared with the original structure, the interpolation circuit uses a group of phase selection circuits. While ensuring the generation of a pair of adjustable quadrature clock signals, the scale of the circuit is reduced, thereby reducing the area of ​​the subsequent layout and reducing the power of the overall circuit. consumption.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuit design, relates to a clock data recovery circuit for high-speed serial communication, and specifically refers to a phase selection / interpolation-based half-rate clock data recovery circuit. Background technique [0002] The clock data recovery circuit is a key module to realize high-speed serial communication. In many transmission systems, the data stream does not have a clock signal associated with it, so the clock data recovery circuit needs to recover the clock signal from the received serial data, and retime the received data through the recovered clock, sampling Noise-containing data, thereby eliminating the jitter introduced during data transmission. [0003] The traditional half-rate clock data recovery circuit structure based on phase selection / interpolation is as follows: figure 1 shown. The circuit consists of half-rate Bang-Bang phase detector, digital filter...

AI Technical Summary

Problems solved by technology

This traditional circuit structure is more complicated in the phase selection / interpolation circuit part. In order to generate a pair of quadrature clock signals, a pair of the same circuit combination is used, that is, two phase selectors plus a phase interpolator. In addition, the digital controller It is necessary to generate four phase selection control signals and one phase interpolation control signal, which increases the design difficulty of the digital controller

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